Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into next
Pull core irq updates from Thomas Gleixner: "The irq department delivers: - Another tree wide update to get rid of the horrible create_irq interface along with its even more horrible variants. That also gets rid of the last leftovers of the initial sparse irq hackery. arch/driver specific changes have been either acked or ignored. - A fix for the spurious interrupt detection logic with threaded interrupts. - A new ARM SoC interrupt controller - The usual pile of fixes and improvements all over the place" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (40 commits) Documentation: brcmstb-l2: Add Broadcom STB Level-2 interrupt controller binding irqchip: brcmstb-l2: Add Broadcom Set Top Box Level-2 interrupt controller genirq: Improve documentation to match current implementation ARM: iop13xx: fix msi support with sparse IRQ genirq: Provide !SMP stub for irq_set_affinity_notifier() irqchip: armada-370-xp: Move the devicetree binding documentation irqchip: gic: Use mask field in GICC_IAR genirq: Remove dynamic_irq mess ia64: Use irq_init_desc genirq: Replace dynamic_irq_init/cleanup genirq: Remove irq_reserve_irq[s] genirq: Replace reserve_irqs in core code s390: Avoid call to irq_reserve_irqs() s390: Remove pointless arch_show_interrupts() s390: pci: Check return value of alloc_irq_desc() proper sh: intc: Remove pointless irq_reserve_irqs() invocation x86, irq: Remove pointless irq_reserve_irqs() call genirq: Make create/destroy_irq() ia64 private tile: Use SPARSE_IRQ tile: pci: Use irq_alloc/free_hwirq() ...
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@@ -125,6 +125,8 @@ config HVC_TILE
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config TILEGX
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bool "Building for TILE-Gx (64-bit) processor"
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select SPARSE_IRQ
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select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
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select HAVE_FUNCTION_TRACER
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select HAVE_FUNCTION_TRACE_MCOUNT_TEST
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select HAVE_FUNCTION_GRAPH_TRACER
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@@ -18,10 +18,12 @@
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#include <linux/hardirq.h>
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/* The hypervisor interface provides 32 IRQs. */
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#define NR_IRQS 32
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#define NR_IRQS 32
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/* IRQ numbers used for linux IPIs. */
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#define IRQ_RESCHEDULE 0
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#define IRQ_RESCHEDULE 0
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/* Interrupts for dynamic allocation start at 1. Let the core allocate irq0 */
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#define NR_IRQS_LEGACY 1
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#define irq_canonicalize(irq) (irq)
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@@ -54,13 +54,6 @@ static DEFINE_PER_CPU(unsigned long, irq_disable_mask)
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*/
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static DEFINE_PER_CPU(int, irq_depth);
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/* State for allocating IRQs on Gx. */
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#if CHIP_HAS_IPI()
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static unsigned long available_irqs = ((1UL << NR_IRQS) - 1) &
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(~(1UL << IRQ_RESCHEDULE));
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static DEFINE_SPINLOCK(available_irqs_lock);
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#endif
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#if CHIP_HAS_IPI()
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/* Use SPRs to manipulate device interrupts. */
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#define mask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_SET_K, irq_mask)
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@@ -278,38 +271,11 @@ int arch_show_interrupts(struct seq_file *p, int prec)
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return 0;
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}
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/*
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* Generic, controller-independent functions:
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*/
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#if CHIP_HAS_IPI()
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int create_irq(void)
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int arch_setup_hwirq(unsigned int irq, int node)
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{
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unsigned long flags;
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int result;
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spin_lock_irqsave(&available_irqs_lock, flags);
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if (available_irqs == 0)
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result = -ENOMEM;
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else {
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result = __ffs(available_irqs);
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available_irqs &= ~(1UL << result);
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dynamic_irq_init(result);
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}
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spin_unlock_irqrestore(&available_irqs_lock, flags);
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return result;
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return irq >= NR_IRQS ? -EINVAL : 0;
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}
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EXPORT_SYMBOL(create_irq);
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void destroy_irq(unsigned int irq)
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{
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unsigned long flags;
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spin_lock_irqsave(&available_irqs_lock, flags);
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available_irqs |= (1UL << irq);
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dynamic_irq_cleanup(irq);
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spin_unlock_irqrestore(&available_irqs_lock, flags);
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}
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EXPORT_SYMBOL(destroy_irq);
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void arch_teardown_hwirq(unsigned int irq) { }
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#endif
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@@ -350,10 +350,9 @@ static int tile_init_irqs(struct pci_controller *controller)
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int cpu;
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/* Ask the kernel to allocate an IRQ. */
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irq = create_irq();
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if (irq < 0) {
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irq = irq_alloc_hwirq(-1);
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if (!irq) {
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pr_err("PCI: no free irq vectors, failed for %d\n", i);
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goto free_irqs;
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}
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controller->irq_intx_table[i] = irq;
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@@ -382,7 +381,7 @@ static int tile_init_irqs(struct pci_controller *controller)
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free_irqs:
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for (j = 0; j < i; j++)
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destroy_irq(controller->irq_intx_table[j]);
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irq_free_hwirq(controller->irq_intx_table[j]);
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return -1;
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}
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@@ -1500,9 +1499,9 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
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int irq;
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int ret;
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irq = create_irq();
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if (irq < 0)
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return irq;
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irq = irq_alloc_hwirq(-1);
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if (!irq)
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return -ENOSPC;
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/*
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* Since we use a 64-bit Mem-Map to accept the MSI write, we fail
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@@ -1601,11 +1600,11 @@ hv_msi_config_failure:
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/* Free mem-map */
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msi_mem_map_alloc_failure:
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is_64_failure:
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destroy_irq(irq);
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irq_free_hwirq(irq);
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return ret;
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}
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void arch_teardown_msi_irq(unsigned int irq)
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{
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destroy_irq(irq);
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irq_free_hwirq(irq);
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}
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