drm/i915: Make *_crtc_mode_set work on new_config
This shouldn't change the behavior of those functions, since they are called after the new_config is made effective and that points to the current config. In a follow up patch, the mode set sequence will be changed so this is called before disabling crtcs, and in that case those functions should work on the staged config. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> [danvet: Flatten if by moving the check into the WARN.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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revīziju iesūtīja
Daniel Vetter

vecāks
cd0707cb1d
revīzija
d0737e1d59
@@ -459,6 +459,27 @@ intel_ddi_get_crtc_encoder(struct drm_crtc *crtc)
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return ret;
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}
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static struct intel_encoder *
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intel_ddi_get_crtc_new_encoder(struct intel_crtc *crtc)
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{
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struct drm_device *dev = crtc->base.dev;
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struct intel_encoder *intel_encoder, *ret = NULL;
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int num_encoders = 0;
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for_each_intel_encoder(dev, intel_encoder) {
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if (intel_encoder->new_crtc == crtc) {
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ret = intel_encoder;
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num_encoders++;
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}
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}
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WARN(num_encoders != 1, "%d encoders on crtc for pipe %c\n", num_encoders,
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pipe_name(crtc->pipe));
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BUG_ON(ret == NULL);
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return ret;
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}
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#define LC_FREQ 2700
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#define LC_FREQ_2K U64_C(LC_FREQ * 2000)
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@@ -792,7 +813,7 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc,
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WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) |
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WRPLL_DIVIDER_POST(p);
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intel_crtc->config.dpll_hw_state.wrpll = val;
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intel_crtc->new_config->dpll_hw_state.wrpll = val;
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pll = intel_get_shared_dpll(intel_crtc);
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if (pll == NULL) {
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@@ -801,7 +822,7 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc,
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return false;
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}
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intel_crtc->config.ddi_pll_sel = PORT_CLK_SEL_WRPLL(pll->id);
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intel_crtc->new_config->ddi_pll_sel = PORT_CLK_SEL_WRPLL(pll->id);
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}
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return true;
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@@ -817,9 +838,9 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc,
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*/
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bool intel_ddi_pll_select(struct intel_crtc *intel_crtc)
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{
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struct drm_crtc *crtc = &intel_crtc->base;
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struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);
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int clock = intel_crtc->config.port_clock;
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struct intel_encoder *intel_encoder =
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intel_ddi_get_crtc_new_encoder(intel_crtc);
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int clock = intel_crtc->new_config->port_clock;
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intel_put_shared_dpll(intel_crtc);
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