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ARM: dts: imx6: phyFLEX: Fix UART hardware flow control

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[ Upstream commit 14cdc1f243d79e0b46be150502b7dba9c5a6bdfd ]

Serial interface uart3 on phyFLEX board is capable of 5-wire connection
including signals RTS and CTS for hardware flow control.

Fix signals UART3_CTS_B and UART3_RTS_B padmux assignments and add
missing property "uart-has-rtscts" to allow serial interface to be
configured and used with the hardware flow control.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Primoz Fiser
2021-04-12 08:24:50 +02:00
committed by Greg Kroah-Hartman
parent 249d8e4ea1
commit d05ebeffca
1 changed files with 3 additions and 2 deletions
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5
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
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@@ -315,8 +315,8 @@
fsl,pins = < fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
>; >;
}; };
@@ -403,6 +403,7 @@
&uart3 { &uart3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>; pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
status = "disabled"; status = "disabled";
}; };