drm/radeon/kms: make sure pci max read request size is valid on evergreen+ (v2)
If the bios or OS sets the pci max read request size to 0 or an invalid value (6,7), it can result in a hang or slowdown. Check and set it to something sane if it's invalid. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=42162 v2: use pci reg defines from include/linux/pci_regs.h Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie

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9adceaa5b3
commit
d054ac16ee
@@ -39,6 +39,7 @@ extern int evergreen_mc_wait_for_idle(struct radeon_device *rdev);
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extern void evergreen_mc_program(struct radeon_device *rdev);
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extern void evergreen_irq_suspend(struct radeon_device *rdev);
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extern int evergreen_mc_init(struct radeon_device *rdev);
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extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev);
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#define EVERGREEN_PFP_UCODE_SIZE 1120
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#define EVERGREEN_PM4_UCODE_SIZE 1376
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@@ -669,6 +670,8 @@ static void cayman_gpu_init(struct radeon_device *rdev)
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WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
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evergreen_fix_pci_max_read_req_size(rdev);
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mc_shared_chmap = RREG32(MC_SHARED_CHMAP);
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mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);
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