sh: Fix up extended mode TLB for SH-X2+ cores.

The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot,
correspondingly, the PGD also has to be 64-bits, so fix that up.

The kernel and user permission bits really are decoupled in early
cuts of the silicon, which means that we also have to set corresponding
kernel permissions on user pages or we end up with user pages that the
kernel simply can't touch (!).

Finally, with those things corrected, really enable MMUCR.ME and
correct the PTEA value (this simply needs to be the upper 32-bits
of the PTE, with the size and protection bit encoding).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

include/asm-sh/page.h

@@ -88,6 +88,7 @@ extern void __copy_user_page(void *to, void *from, void *orig_to);
 #ifdef CONFIG_X2TLB
 typedef struct { unsigned long pte_low, pte_high; } pte_t;
 typedef struct { unsigned long long pgprot; } pgprot_t;
+typedef struct { unsigned long long pgd; } pgd_t;
 #define pte_val(x) \
 	((x).pte_low | ((unsigned long long)(x).pte_high << 32))
 #define __pte(x) \
@@ -95,12 +96,11 @@ typedef struct { unsigned long long pgprot; } pgprot_t;
 #else
 typedef struct { unsigned long pte_low; } pte_t;
 typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct { unsigned long pgd; } pgd_t;
 #define pte_val(x)	((x).pte_low)
 #define __pte(x) ((pte_t) { (x) } )
 #endif
 
-typedef struct { unsigned long pgd; } pgd_t;
-
 #define pgd_val(x)	((x).pgd)
 #define pgprot_val(x)	((x).pgprot)