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Merge tag 'mfd-for-linus-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Browse Source 
Pull MFD updates from Lee Jones:
 "Core framework:
   - Add the MFD bindings doc to MAINTAINERS

  New drivers:
   - X-Powers AC100 Audio CODEC and RTC
   - TI LP873x PMIC
   - Rockchip RK808 PMIC
   - Samsung Exynos Low Power Audio

  New device support:
   - Add support for STMPE1600 variant to stmpe
   - Add support for PM8018 PMIC to pm8921-core
   - Add support for AXP806 PMIC in axp20x
   - Add support for AXP209 GPIO in axp20x

  New functionality:
   - Add support for Reset to all STMPE variants
   - Add support for MKBP event support to cros_ec
   - Add support for USB to intel_soc_pmic_bxtwc
   - Add support for IRQs and Power Button to tps65217

  Fix-ups:
   - Clean-up defunct author emails (da9063, max14577)
   - Kconfig fixups (wm8350-i2c, as37220
   - Constify (altera-a10sr, sm501)
   - Supply PCI IDs (intel-lpss-pci)
   - Improve clocking (qcom_rpm)
   - Fix IRQ probing (ucb1x00-core)
   - Ensure fault log is cleared (da9052)
   - Remove NO_IRQ check (ucb1x00-core)
   - Supply I2C properties (intel-lpss-acpi, intel-lpss-pci)
   - Non standard declaration (tps65217, max8997-irq)
   - Remove unused code (lp873x, db8500-prcmu, ab8500-debugfs,
     cros_ec_spi)
   - Make non-modular (altera-a10sr, intel_msic, smsc-ece1099,
     sun6i-prcm, twl-core)
   - OF bindings (ac100, stmpe, qcom-pm8xxx, qcom-rpm, rk808, axp20x,
     lp873x, exynos5433-lpass, act8945a, aspeed-scu, twl6040, arizona)

  Bugfixes:
   - Release OF pointer (qcom_rpm)
   - Avoid double shifting in suspend/resume (88pm80x)
   - Fix 'defined but not used' error (exynos-lpass)
   - Fix 'sleeping whilst attomic' (atmel-hlcdc)"

* tag 'mfd-for-linus-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (69 commits)
  mfd: arizona: Handle probe deferral for reset GPIO
  mfd: arizona: Remove arizona_of_get_named_gpio helper function
  mfd: arizona: Add DT options for max_channels_clocked and PDM speaker config
  mfd: twl6040: Register child device for twl6040-pdmclk
  mfd: cros_ec_spi: Remove unused variable 'request'
  mfd: omap-usb-host: Return value is not 'const int'
  mfd: ab8500-debugfs: Remove 'weak' function suspend_test_wake_cause_interrupt_is_mine()
  mfd: ab8500-debugfs: Remove ab8500_dump_all_banks_to_mem()
  mfd: db8500-prcmu: Remove unused *prcmu_set_ddr_opp() calls
  mfd: ab8500-debugfs: Prevent initialised field from being over-written
  mfd: max8997-irq: 'inline' should be at the beginning of the declaration
  mfd: rk808: Fix RK818_IRQ_DISCHG_ILIM initializer
  mfd: tps65217: Fix nonstandard declaration
  mfd: lp873x: Remove unused mutex lock from struct lp873x
  mfd: atmel-hlcdc: Do not sleep in atomic context
  mfd: exynos-lpass: Mark PM functions as __maybe_unused
  mfd: intel-lpss: Add default I2C device properties for Apollo Lake
  mfd: twl-core: Make it explicitly non-modular
  mfd: sun6i-prcm: Make it explicitly non-modular
  mfd: smsc-ece1099: Make it explicitly non-modular
  ...
This commit is contained in:
Linus Torvalds
2016-10-07 08:35:35 -07:00
parent 3477d168ba b8d336ed90
commit d042380886
80 changed files with 3123 additions and 457 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
include/linux/mfd/88pm80x.h
View File

@@ -350,7 +350,7 @@ static inline int pm80x_dev_suspend(struct device *dev)
int irq = platform_get_irq(pdev, 0);
if (device_may_wakeup(dev))
set_bit((1 << irq), &chip->wu_flag);
set_bit(irq, &chip->wu_flag);
return 0;
}
@@ -362,7 +362,7 @@ static inline int pm80x_dev_resume(struct device *dev)
int irq = platform_get_irq(pdev, 0);
if (device_may_wakeup(dev))
clear_bit((1 << irq), &chip->wu_flag);
clear_bit(irq, &chip->wu_flag);
return 0;
}

2
include/linux/mfd/abx500/ab8500.h
View File

@@ -63,6 +63,8 @@ enum ab8500_version {
#define AB8500_STE_TEST 0x14
#define AB8500_OTP_EMUL 0x15
#define AB8500_DEBUG_FIELD_LAST 0x16
/*
* Interrupts
* Values used to index into array ab8500_irq_regoffset[] defined in

178
include/linux/mfd/ac100.h Normal file
View File

@@ -0,0 +1,178 @@
/*
* Functions and registers to access AC100 codec / RTC combo IC.
*
* Copyright (C) 2016 Chen-Yu Tsai
*
* Chen-Yu Tsai <wens@csie.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_MFD_AC100_H
#define __LINUX_MFD_AC100_H
#include <linux/regmap.h>
struct ac100_dev {
struct device *dev;
struct regmap *regmap;
};
/* Audio codec related registers */
#define AC100_CHIP_AUDIO_RST 0x00
#define AC100_PLL_CTRL1 0x01
#define AC100_PLL_CTRL2 0x02
#define AC100_SYSCLK_CTRL 0x03
#define AC100_MOD_CLK_ENA 0x04
#define AC100_MOD_RST_CTRL 0x05
#define AC100_I2S_SR_CTRL 0x06
/* I2S1 interface */
#define AC100_I2S1_CLK_CTRL 0x10
#define AC100_I2S1_SND_OUT_CTRL 0x11
#define AC100_I2S1_SND_IN_CTRL 0x12
#define AC100_I2S1_MXR_SRC 0x13
#define AC100_I2S1_VOL_CTRL1 0x14
#define AC100_I2S1_VOL_CTRL2 0x15
#define AC100_I2S1_VOL_CTRL3 0x16
#define AC100_I2S1_VOL_CTRL4 0x17
#define AC100_I2S1_MXR_GAIN 0x18
/* I2S2 interface */
#define AC100_I2S2_CLK_CTRL 0x20
#define AC100_I2S2_SND_OUT_CTRL 0x21
#define AC100_I2S2_SND_IN_CTRL 0x22
#define AC100_I2S2_MXR_SRC 0x23
#define AC100_I2S2_VOL_CTRL1 0x24
#define AC100_I2S2_VOL_CTRL2 0x25
#define AC100_I2S2_VOL_CTRL3 0x26
#define AC100_I2S2_VOL_CTRL4 0x27
#define AC100_I2S2_MXR_GAIN 0x28
/* I2S3 interface */
#define AC100_I2S3_CLK_CTRL 0x30
#define AC100_I2S3_SND_OUT_CTRL 0x31
#define AC100_I2S3_SND_IN_CTRL 0x32
#define AC100_I2S3_SIG_PATH_CTRL 0x33
/* ADC digital controls */
#define AC100_ADC_DIG_CTRL 0x40
#define AC100_ADC_VOL_CTRL 0x41
/* HMIC plug sensing / key detection */
#define AC100_HMIC_CTRL1 0x44
#define AC100_HMIC_CTRL2 0x45
#define AC100_HMIC_STATUS 0x46
/* DAC digital controls */
#define AC100_DAC_DIG_CTRL 0x48
#define AC100_DAC_VOL_CTRL 0x49
#define AC100_DAC_MXR_SRC 0x4c
#define AC100_DAC_MXR_GAIN 0x4d
/* Analog controls */
#define AC100_ADC_APC_CTRL 0x50
#define AC100_ADC_SRC 0x51
#define AC100_ADC_SRC_BST_CTRL 0x52
#define AC100_OUT_MXR_DAC_A_CTRL 0x53
#define AC100_OUT_MXR_SRC 0x54
#define AC100_OUT_MXR_SRC_BST 0x55
#define AC100_HPOUT_CTRL 0x56
#define AC100_ERPOUT_CTRL 0x57
#define AC100_SPKOUT_CTRL 0x58
#define AC100_LINEOUT_CTRL 0x59
/* ADC digital audio processing (high pass filter & auto gain control */
#define AC100_ADC_DAP_L_STA 0x80
#define AC100_ADC_DAP_R_STA 0x81
#define AC100_ADC_DAP_L_CTRL 0x82
#define AC100_ADC_DAP_R_CTRL 0x83
#define AC100_ADC_DAP_L_T_L 0x84 /* Left Target Level */
#define AC100_ADC_DAP_R_T_L 0x85 /* Right Target Level */
#define AC100_ADC_DAP_L_H_A_C 0x86 /* Left High Avg. Coef */
#define AC100_ADC_DAP_L_L_A_C 0x87 /* Left Low Avg. Coef */
#define AC100_ADC_DAP_R_H_A_C 0x88 /* Right High Avg. Coef */
#define AC100_ADC_DAP_R_L_A_C 0x89 /* Right Low Avg. Coef */
#define AC100_ADC_DAP_L_D_T 0x8a /* Left Decay Time */
#define AC100_ADC_DAP_L_A_T 0x8b /* Left Attack Time */
#define AC100_ADC_DAP_R_D_T 0x8c /* Right Decay Time */
#define AC100_ADC_DAP_R_A_T 0x8d /* Right Attack Time */
#define AC100_ADC_DAP_N_TH 0x8e /* Noise Threshold */
#define AC100_ADC_DAP_L_H_N_A_C 0x8f /* Left High Noise Avg. Coef */
#define AC100_ADC_DAP_L_L_N_A_C 0x90 /* Left Low Noise Avg. Coef */
#define AC100_ADC_DAP_R_H_N_A_C 0x91 /* Right High Noise Avg. Coef */
#define AC100_ADC_DAP_R_L_N_A_C 0x92 /* Right Low Noise Avg. Coef */
#define AC100_ADC_DAP_H_HPF_C 0x93 /* High High-Pass-Filter Coef */
#define AC100_ADC_DAP_L_HPF_C 0x94 /* Low High-Pass-Filter Coef */
#define AC100_ADC_DAP_OPT 0x95 /* AGC Optimum */
/* DAC digital audio processing (high pass filter & dynamic range control) */
#define AC100_DAC_DAP_CTRL 0xa0
#define AC100_DAC_DAP_H_HPF_C 0xa1 /* High High-Pass-Filter Coef */
#define AC100_DAC_DAP_L_HPF_C 0xa2 /* Low High-Pass-Filter Coef */
#define AC100_DAC_DAP_L_H_E_A_C 0xa3 /* Left High Energy Avg Coef */
#define AC100_DAC_DAP_L_L_E_A_C 0xa4 /* Left Low Energy Avg Coef */
#define AC100_DAC_DAP_R_H_E_A_C 0xa5 /* Right High Energy Avg Coef */
#define AC100_DAC_DAP_R_L_E_A_C 0xa6 /* Right Low Energy Avg Coef */
#define AC100_DAC_DAP_H_G_D_T_C 0xa7 /* High Gain Delay Time Coef */
#define AC100_DAC_DAP_L_G_D_T_C 0xa8 /* Low Gain Delay Time Coef */
#define AC100_DAC_DAP_H_G_A_T_C 0xa9 /* High Gain Attack Time Coef */
#define AC100_DAC_DAP_L_G_A_T_C 0xaa /* Low Gain Attack Time Coef */
#define AC100_DAC_DAP_H_E_TH 0xab /* High Energy Threshold */
#define AC100_DAC_DAP_L_E_TH 0xac /* Low Energy Threshold */
#define AC100_DAC_DAP_H_G_K 0xad /* High Gain K parameter */
#define AC100_DAC_DAP_L_G_K 0xae /* Low Gain K parameter */
#define AC100_DAC_DAP_H_G_OFF 0xaf /* High Gain offset */
#define AC100_DAC_DAP_L_G_OFF 0xb0 /* Low Gain offset */
#define AC100_DAC_DAP_OPT 0xb1 /* DRC optimum */
/* Digital audio processing enable */
#define AC100_ADC_DAP_ENA 0xb4
#define AC100_DAC_DAP_ENA 0xb5
/* SRC control */
#define AC100_SRC1_CTRL1 0xb8
#define AC100_SRC1_CTRL2 0xb9
#define AC100_SRC1_CTRL3 0xba
#define AC100_SRC1_CTRL4 0xbb
#define AC100_SRC2_CTRL1 0xbc
#define AC100_SRC2_CTRL2 0xbd
#define AC100_SRC2_CTRL3 0xbe
#define AC100_SRC2_CTRL4 0xbf
/* RTC clk control */
#define AC100_CLK32K_ANALOG_CTRL 0xc0
#define AC100_CLKOUT_CTRL1 0xc1
#define AC100_CLKOUT_CTRL2 0xc2
#define AC100_CLKOUT_CTRL3 0xc3
/* RTC module */
#define AC100_RTC_RST 0xc6
#define AC100_RTC_CTRL 0xc7
#define AC100_RTC_SEC 0xc8 /* second */
#define AC100_RTC_MIN 0xc9 /* minute */
#define AC100_RTC_HOU 0xca /* hour */
#define AC100_RTC_WEE 0xcb /* weekday */
#define AC100_RTC_DAY 0xcc /* day */
#define AC100_RTC_MON 0xcd /* month */
#define AC100_RTC_YEA 0xce /* year */
#define AC100_RTC_UPD 0xcf /* update trigger */
/* RTC alarm */
#define AC100_ALM_INT_ENA 0xd0
#define AC100_ALM_INT_STA 0xd1
#define AC100_ALM_SEC 0xd8
#define AC100_ALM_MIN 0xd9
#define AC100_ALM_HOU 0xda
#define AC100_ALM_WEE 0xdb
#define AC100_ALM_DAY 0xdc
#define AC100_ALM_MON 0xdd
#define AC100_ALM_YEA 0xde
#define AC100_ALM_UPD 0xdf
/* RTC general purpose register 0 ~ 15 */
#define AC100_RTC_GP(x) (0xe0 + (x))
#endif /* __LINUX_MFD_AC100_H */

12
include/linux/mfd/arizona/core.h
View File

@@ -13,6 +13,7 @@
#ifndef _WM_ARIZONA_CORE_H
#define _WM_ARIZONA_CORE_H
#include <linux/clk.h>
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/regmap.h>
@@ -21,6 +22,12 @@
#define ARIZONA_MAX_CORE_SUPPLIES 2
enum {
ARIZONA_MCLK1,
ARIZONA_MCLK2,
ARIZONA_NUM_MCLK
};
enum arizona_type {
WM5102 = 1,
WM5110 = 2,
@@ -139,6 +146,8 @@ struct arizona {
struct mutex clk_lock;
int clk32k_ref;
struct clk *mclk[ARIZONA_NUM_MCLK];
bool ctrlif_error;
struct snd_soc_dapm_context *dapm;
@@ -182,7 +191,4 @@ int cs47l24_patch(struct arizona *arizona);
int wm8997_patch(struct arizona *arizona);
int wm8998_patch(struct arizona *arizona);
extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
bool mandatory);
#endif

60
include/linux/mfd/axp20x.h
View File

@@ -20,6 +20,7 @@ enum {
AXP221_ID,
AXP223_ID,
AXP288_ID,
AXP806_ID,
AXP809_ID,
NR_AXP20X_VARIANTS,
};
@@ -91,6 +92,30 @@ enum {
#define AXP22X_ALDO3_V_OUT 0x2a
#define AXP22X_CHRG_CTRL3 0x35
#define AXP806_STARTUP_SRC 0x00
#define AXP806_CHIP_ID 0x03
#define AXP806_PWR_OUT_CTRL1 0x10
#define AXP806_PWR_OUT_CTRL2 0x11
#define AXP806_DCDCA_V_CTRL 0x12
#define AXP806_DCDCB_V_CTRL 0x13
#define AXP806_DCDCC_V_CTRL 0x14
#define AXP806_DCDCD_V_CTRL 0x15
#define AXP806_DCDCE_V_CTRL 0x16
#define AXP806_ALDO1_V_CTRL 0x17
#define AXP806_ALDO2_V_CTRL 0x18
#define AXP806_ALDO3_V_CTRL 0x19
#define AXP806_DCDC_MODE_CTRL1 0x1a
#define AXP806_DCDC_MODE_CTRL2 0x1b
#define AXP806_DCDC_FREQ_CTRL 0x1c
#define AXP806_BLDO1_V_CTRL 0x20
#define AXP806_BLDO2_V_CTRL 0x21
#define AXP806_BLDO3_V_CTRL 0x22
#define AXP806_BLDO4_V_CTRL 0x23
#define AXP806_CLDO1_V_CTRL 0x24
#define AXP806_CLDO2_V_CTRL 0x25
#define AXP806_CLDO3_V_CTRL 0x26
#define AXP806_VREF_TEMP_WARN_L 0xf3
/* Interrupt */
#define AXP152_IRQ1_EN 0x40
#define AXP152_IRQ2_EN 0x41
@@ -265,6 +290,26 @@ enum {
AXP22X_REG_ID_MAX,
};
enum {
AXP806_DCDCA = 0,
AXP806_DCDCB,
AXP806_DCDCC,
AXP806_DCDCD,
AXP806_DCDCE,
AXP806_ALDO1,
AXP806_ALDO2,
AXP806_ALDO3,
AXP806_BLDO1,
AXP806_BLDO2,
AXP806_BLDO3,
AXP806_BLDO4,
AXP806_CLDO1,
AXP806_CLDO2,
AXP806_CLDO3,
AXP806_SW,
AXP806_REG_ID_MAX,
};
enum {
AXP809_DCDC1 = 0,
AXP809_DCDC2,
@@ -414,6 +459,21 @@ enum axp288_irqs {
AXP288_IRQ_BC_USB_CHNG,
};
enum axp806_irqs {
AXP806_IRQ_DIE_TEMP_HIGH_LV1,
AXP806_IRQ_DIE_TEMP_HIGH_LV2,
AXP806_IRQ_DCDCA_V_LOW,
AXP806_IRQ_DCDCB_V_LOW,
AXP806_IRQ_DCDCC_V_LOW,
AXP806_IRQ_DCDCD_V_LOW,
AXP806_IRQ_DCDCE_V_LOW,
AXP806_IRQ_PWROK_LONG,
AXP806_IRQ_PWROK_SHORT,
AXP806_IRQ_WAKEUP,
AXP806_IRQ_PWROK_FALL,
AXP806_IRQ_PWROK_RISE,
};
enum axp809_irqs {
AXP809_IRQ_ACIN_OVER_V = 1,
AXP809_IRQ_ACIN_PLUGIN,

18
include/linux/mfd/cros_ec.h
View File

@@ -109,6 +109,10 @@ struct cros_ec_command {
* should check msg.result for the EC's result code.
* @pkt_xfer: send packet to EC and get response
* @lock: one transaction at a time
* @mkbp_event_supported: true if this EC supports the MKBP event protocol.
* @event_notifier: interrupt event notifier for transport devices.
* @event_data: raw payload transferred with the MKBP event.
* @event_size: size in bytes of the event data.
*/
struct cros_ec_device {
@@ -137,6 +141,11 @@ struct cros_ec_device {
int (*pkt_xfer)(struct cros_ec_device *ec,
struct cros_ec_command *msg);
struct mutex lock;
bool mkbp_event_supported;
struct blocking_notifier_head event_notifier;
struct ec_response_get_next_event event_data;
int event_size;
};
/* struct cros_ec_platform - ChromeOS EC platform information
@@ -269,6 +278,15 @@ int cros_ec_register(struct cros_ec_device *ec_dev);
*/
int cros_ec_query_all(struct cros_ec_device *ec_dev);
/**
* cros_ec_get_next_event - Fetch next event from the ChromeOS EC
*
* @ec_dev: Device to fetch event from
*
* Returns: 0 on success, Linux error number on failure
*/
int cros_ec_get_next_event(struct cros_ec_device *ec_dev);
/* sysfs stuff */
extern struct attribute_group cros_ec_attr_group;
extern struct attribute_group cros_ec_lightbar_attr_group;

34
include/linux/mfd/cros_ec_commands.h
View File

@@ -1793,6 +1793,40 @@ struct ec_result_keyscan_seq_ctrl {
};
} __packed;
/*
* Command for retrieving the next pending MKBP event from the EC device
*
* The device replies with UNAVAILABLE if there aren't any pending events.
*/
#define EC_CMD_GET_NEXT_EVENT 0x67
enum ec_mkbp_event {
/* Keyboard matrix changed. The event data is the new matrix state. */
EC_MKBP_EVENT_KEY_MATRIX = 0,
/* New host event. The event data is 4 bytes of host event flags. */
EC_MKBP_EVENT_HOST_EVENT = 1,
/* New Sensor FIFO data. The event data is fifo_info structure. */
EC_MKBP_EVENT_SENSOR_FIFO = 2,
/* Number of MKBP events */
EC_MKBP_EVENT_COUNT,
};
union ec_response_get_next_data {
uint8_t key_matrix[13];
/* Unaligned */
uint32_t host_event;
} __packed;
struct ec_response_get_next_event {
uint8_t event_type;
/* Followed by event data if any */
union ec_response_get_next_data data;
} __packed;
/*****************************************************************************/
/* Temperature sensor commands */

4
include/linux/mfd/da9063/core.h
View File

@@ -3,8 +3,8 @@
*
* Copyright 2012 Dialog Semiconductor Ltd.
*
* Author: Michal Hajduk <michal.hajduk@diasemi.com>
* Krystian Garbaciak <krystian.garbaciak@diasemi.com>
* Author: Michal Hajduk, Dialog Semiconductor
* Author: Krystian Garbaciak, Dialog Semiconductor
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the

4
include/linux/mfd/da9063/pdata.h
View File

@@ -3,8 +3,8 @@
*
* Copyright 2012 Dialog Semiconductor Ltd.
*
* Author: Michal Hajduk <michal.hajduk@diasemi.com>
* Author: Krystian Garbaciak <krystian.garbaciak@diasemi.com>
* Author: Michal Hajduk, Dialog Semiconductor
* Author: Krystian Garbaciak, Dialog Semiconductor
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the

4
include/linux/mfd/da9063/registers.h
View File

@@ -3,8 +3,8 @@
*
* Copyright 2012 Dialog Semiconductor Ltd.
*
* Author: Michal Hajduk <michal.hajduk@diasemi.com>
* Krystian Garbaciak <krystian.garbaciak@diasemi.com>
* Author: Michal Hajduk, Dialog Semiconductor
* Author: Krystian Garbaciak, Dialog Semiconductor
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the

6
include/linux/mfd/db8500-prcmu.h
View File

@@ -538,7 +538,6 @@ int db8500_prcmu_get_arm_opp(void);
int db8500_prcmu_set_ape_opp(u8 opp);
int db8500_prcmu_get_ape_opp(void);
int db8500_prcmu_request_ape_opp_100_voltage(bool enable);
int db8500_prcmu_set_ddr_opp(u8 opp);
int db8500_prcmu_get_ddr_opp(void);
u32 db8500_prcmu_read(unsigned int reg);
@@ -594,11 +593,6 @@ static inline int prcmu_release_usb_wakeup_state(void)
return 0;
}
static inline int db8500_prcmu_set_ddr_opp(u8 opp)
{
return 0;
}
static inline int db8500_prcmu_get_ddr_opp(void)
{
return DDR_100_OPP;

9
include/linux/mfd/dbx500-prcmu.h
View File

@@ -269,10 +269,6 @@ unsigned long prcmu_clock_rate(u8 clock);
long prcmu_round_clock_rate(u8 clock, unsigned long rate);
int prcmu_set_clock_rate(u8 clock, unsigned long rate);
static inline int prcmu_set_ddr_opp(u8 opp)
{
return db8500_prcmu_set_ddr_opp(opp);
}
static inline int prcmu_get_ddr_opp(void)
{
return db8500_prcmu_get_ddr_opp();
@@ -489,11 +485,6 @@ static inline int prcmu_get_arm_opp(void)
return ARM_100_OPP;
}
static inline int prcmu_set_ddr_opp(u8 opp)
{
return 0;
}
static inline int prcmu_get_ddr_opp(void)
{
return DDR_100_OPP;

1
include/linux/mfd/lp873x.h
View File

@@ -263,7 +263,6 @@ enum lp873x_regulator_id {
struct lp873x {
struct device *dev;
u8 rev;
struct mutex lock; /* lock guarding the data structure */
struct regmap *regmap;
};
#endif /* __LINUX_MFD_LP873X_H */

2
include/linux/mfd/max14577-private.h
View File

@@ -3,7 +3,7 @@
*
* Copyright (C) 2014 Samsung Electrnoics
* Chanwoo Choi <cw00.choi@samsung.com>
* Krzysztof Kozlowski <k.kozlowski@samsung.com>
* Krzysztof Kozlowski <krzk@kernel.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

2
include/linux/mfd/max14577.h
View File

@@ -3,7 +3,7 @@
*
* Copyright (C) 2014 Samsung Electrnoics
* Chanwoo Choi <cw00.choi@samsung.com>
* Krzysztof Kozlowski <k.kozlowski@samsung.com>
* Krzysztof Kozlowski <krzk@kernel.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

156
include/linux/mfd/rk808.h
View File

@@ -1,11 +1,15 @@
/*
* rk808.h for Rockchip RK808
* Register definitions for Rockchip's RK808/RK818 PMIC
*
* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
*
* Author: Chris Zhong <zyw@rock-chips.com>
* Author: Zhang Qing <zhangqing@rock-chips.com>
*
* Copyright (C) 2016 PHYTEC Messtechnik GmbH
*
* Author: Wadim Egorov <w.egorov@phytec.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
@@ -16,8 +20,8 @@
* more details.
*/
#ifndef __LINUX_REGULATOR_rk808_H
#define __LINUX_REGULATOR_rk808_H
#ifndef __LINUX_REGULATOR_RK808_H
#define __LINUX_REGULATOR_RK808_H
#include <linux/regulator/machine.h>
#include <linux/regmap.h>
@@ -28,7 +32,7 @@
#define RK808_DCDC1 0 /* (0+RK808_START) */
#define RK808_LDO1 4 /* (4+RK808_START) */
#define RK808_NUM_REGULATORS 14
#define RK808_NUM_REGULATORS 14
enum rk808_reg {
RK808_ID_DCDC1,
@@ -65,6 +69,8 @@ enum rk808_reg {
#define RK808_RTC_INT_REG 0x12
#define RK808_RTC_COMP_LSB_REG 0x13
#define RK808_RTC_COMP_MSB_REG 0x14
#define RK808_ID_MSB 0x17
#define RK808_ID_LSB 0x18
#define RK808_CLK32OUT_REG 0x20
#define RK808_VB_MON_REG 0x21
#define RK808_THERMAL_REG 0x22
@@ -115,7 +121,92 @@ enum rk808_reg {
#define RK808_INT_STS_MSK_REG2 0x4f
#define RK808_IO_POL_REG 0x50
/* IRQ Definitions */
/* RK818 */
#define RK818_DCDC1 0
#define RK818_LDO1 4
#define RK818_NUM_REGULATORS 17
enum rk818_reg {
RK818_ID_DCDC1,
RK818_ID_DCDC2,
RK818_ID_DCDC3,
RK818_ID_DCDC4,
RK818_ID_BOOST,
RK818_ID_LDO1,
RK818_ID_LDO2,
RK818_ID_LDO3,
RK818_ID_LDO4,
RK818_ID_LDO5,
RK818_ID_LDO6,
RK818_ID_LDO7,
RK818_ID_LDO8,
RK818_ID_LDO9,
RK818_ID_SWITCH,
RK818_ID_HDMI_SWITCH,
RK818_ID_OTG_SWITCH,
};
#define RK818_DCDC_EN_REG 0x23
#define RK818_LDO_EN_REG 0x24
#define RK818_SLEEP_SET_OFF_REG1 0x25
#define RK818_SLEEP_SET_OFF_REG2 0x26
#define RK818_DCDC_UV_STS_REG 0x27
#define RK818_DCDC_UV_ACT_REG 0x28
#define RK818_LDO_UV_STS_REG 0x29
#define RK818_LDO_UV_ACT_REG 0x2a
#define RK818_DCDC_PG_REG 0x2b
#define RK818_LDO_PG_REG 0x2c
#define RK818_VOUT_MON_TDB_REG 0x2d
#define RK818_BUCK1_CONFIG_REG 0x2e
#define RK818_BUCK1_ON_VSEL_REG 0x2f
#define RK818_BUCK1_SLP_VSEL_REG 0x30
#define RK818_BUCK2_CONFIG_REG 0x32
#define RK818_BUCK2_ON_VSEL_REG 0x33
#define RK818_BUCK2_SLP_VSEL_REG 0x34
#define RK818_BUCK3_CONFIG_REG 0x36
#define RK818_BUCK4_CONFIG_REG 0x37
#define RK818_BUCK4_ON_VSEL_REG 0x38
#define RK818_BUCK4_SLP_VSEL_REG 0x39
#define RK818_BOOST_CONFIG_REG 0x3a
#define RK818_LDO1_ON_VSEL_REG 0x3b
#define RK818_LDO1_SLP_VSEL_REG 0x3c
#define RK818_LDO2_ON_VSEL_REG 0x3d
#define RK818_LDO2_SLP_VSEL_REG 0x3e
#define RK818_LDO3_ON_VSEL_REG 0x3f
#define RK818_LDO3_SLP_VSEL_REG 0x40
#define RK818_LDO4_ON_VSEL_REG 0x41
#define RK818_LDO4_SLP_VSEL_REG 0x42
#define RK818_LDO5_ON_VSEL_REG 0x43
#define RK818_LDO5_SLP_VSEL_REG 0x44
#define RK818_LDO6_ON_VSEL_REG 0x45
#define RK818_LDO6_SLP_VSEL_REG 0x46
#define RK818_LDO7_ON_VSEL_REG 0x47
#define RK818_LDO7_SLP_VSEL_REG 0x48
#define RK818_LDO8_ON_VSEL_REG 0x49
#define RK818_LDO8_SLP_VSEL_REG 0x4a
#define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
#define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
#define RK818_DEVCTRL_REG 0x4b
#define RK818_INT_STS_REG1 0X4c
#define RK818_INT_STS_MSK_REG1 0x4d
#define RK818_INT_STS_REG2 0x4e
#define RK818_INT_STS_MSK_REG2 0x4f
#define RK818_IO_POL_REG 0x50
#define RK818_H5V_EN_REG 0x52
#define RK818_SLEEP_SET_OFF_REG3 0x53
#define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
#define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
#define RK818_BOOST_CTRL_REG 0x56
#define RK818_DCDC_ILMAX 0x90
#define RK818_USB_CTRL_REG 0xa1
#define RK818_H5V_EN BIT(0)
#define RK818_REF_RDY_CTRL BIT(1)
#define RK818_USB_ILIM_SEL_MASK 0xf
#define RK818_USB_ILMIN_2000MA 0x7
#define RK818_USB_CHG_SD_VSEL_MASK 0x70
/* RK808 IRQ Definitions */
#define RK808_IRQ_VOUT_LO 0
#define RK808_IRQ_VB_LO 1
#define RK808_IRQ_PWRON 2
@@ -137,6 +228,43 @@ enum rk808_reg {
#define RK808_IRQ_PLUG_IN_INT_MSK BIT(0)
#define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1)
/* RK818 IRQ Definitions */
#define RK818_IRQ_VOUT_LO 0
#define RK818_IRQ_VB_LO 1
#define RK818_IRQ_PWRON 2
#define RK818_IRQ_PWRON_LP 3
#define RK818_IRQ_HOTDIE 4
#define RK818_IRQ_RTC_ALARM 5
#define RK818_IRQ_RTC_PERIOD 6
#define RK818_IRQ_USB_OV 7
#define RK818_IRQ_PLUG_IN 8
#define RK818_IRQ_PLUG_OUT 9
#define RK818_IRQ_CHG_OK 10
#define RK818_IRQ_CHG_TE 11
#define RK818_IRQ_CHG_TS1 12
#define RK818_IRQ_TS2 13
#define RK818_IRQ_CHG_CVTLIM 14
#define RK818_IRQ_DISCHG_ILIM 15
#define RK818_IRQ_VOUT_LO_MSK BIT(0)
#define RK818_IRQ_VB_LO_MSK BIT(1)
#define RK818_IRQ_PWRON_MSK BIT(2)
#define RK818_IRQ_PWRON_LP_MSK BIT(3)
#define RK818_IRQ_HOTDIE_MSK BIT(4)
#define RK818_IRQ_RTC_ALARM_MSK BIT(5)
#define RK818_IRQ_RTC_PERIOD_MSK BIT(6)
#define RK818_IRQ_USB_OV_MSK BIT(7)
#define RK818_IRQ_PLUG_IN_MSK BIT(0)
#define RK818_IRQ_PLUG_OUT_MSK BIT(1)
#define RK818_IRQ_CHG_OK_MSK BIT(2)
#define RK818_IRQ_CHG_TE_MSK BIT(3)
#define RK818_IRQ_CHG_TS1_MSK BIT(4)
#define RK818_IRQ_TS2_MSK BIT(5)
#define RK818_IRQ_CHG_CVTLIM_MSK BIT(6)
#define RK818_IRQ_DISCHG_ILIM_MSK BIT(7)
#define RK818_NUM_IRQ 16
#define RK808_VBAT_LOW_2V8 0x00
#define RK808_VBAT_LOW_2V9 0x01
#define RK808_VBAT_LOW_3V0 0x02
@@ -191,9 +319,17 @@ enum {
BOOST_ILMIN_250MA,
};
struct rk808 {
struct i2c_client *i2c;
struct regmap_irq_chip_data *irq_data;
struct regmap *regmap;
enum {
RK808_ID = 0x0000,
RK818_ID = 0x8181,
};
#endif /* __LINUX_REGULATOR_rk808_H */
struct rk808 {
struct i2c_client *i2c;
struct regmap_irq_chip_data *irq_data;
struct regmap *regmap;
long variant;
const struct regmap_config *regmap_cfg;
const struct regmap_irq_chip *regmap_irq_chip;
};
#endif /* __LINUX_REGULATOR_RK808_H */

4
include/linux/mfd/syscon/exynos5-pmu.h
View File

@@ -43,8 +43,10 @@
#define EXYNOS5433_MIPI_PHY2_CONTROL (0x718)
#define EXYNOS5_PHY_ENABLE BIT(0)
#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1)
#define EXYNOS5_MIPI_PHY_M_RESETN BIT(2)
#define EXYNOS5433_PAD_RETENTION_AUD_OPTION (0x3028)
#define EXYNOS5433_PAD_INITIATE_WAKEUP_FROM_LOWPWR BIT(28)
#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */

12
include/linux/mfd/tps65217.h
View File

@@ -73,6 +73,7 @@
#define TPS65217_PPATH_AC_CURRENT_MASK 0x0C
#define TPS65217_PPATH_USB_CURRENT_MASK 0x03
#define TPS65217_INT_RESERVEDM BIT(7)
#define TPS65217_INT_PBM BIT(6)
#define TPS65217_INT_ACM BIT(5)
#define TPS65217_INT_USBM BIT(4)
@@ -233,6 +234,13 @@ struct tps65217_bl_pdata {
int dft_brightness;
};
enum tps65217_irq_type {
TPS65217_IRQ_PB,
TPS65217_IRQ_AC,
TPS65217_IRQ_USB,
TPS65217_NUM_IRQ
};
/**
* struct tps65217_board - packages regulator init data
* @tps65217_regulator_data: regulator initialization values
@@ -258,6 +266,10 @@ struct tps65217 {
struct regulator_desc desc[TPS65217_NUM_REGULATOR];
struct regmap *regmap;
u8 *strobes;
struct irq_domain *irq_domain;
struct mutex irq_lock;
u8 irq_mask;
int irq;
};
static inline struct tps65217 *dev_to_tps65217(struct device *dev)

2
include/linux/mfd/twl6040.h
View File

@@ -168,7 +168,7 @@
#define TWL6040_VIBROCDET 0x20
#define TWL6040_TSHUTDET 0x40
#define TWL6040_CELLS 3
#define TWL6040_CELLS 4
#define TWL6040_REV_ES1_0 0x00
#define TWL6040_REV_ES1_1 0x01 /* Rev ES1.1 and ES1.2 */