[media] altera-stapl: it is time to move out from staging

[mchehab@redhat.com: Fix a merge conflict]
Signed-off-by: Igor M. Liplianin <liplianin@netup.ru>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Igor M. Liplianin
2011-09-23 11:17:41 -03:00
committed by Mauro Carvalho Chehab
부모 08347cdd2d
커밋 cff4fa8415
15개의 변경된 파일10개의 추가작업 그리고 9개의 파일을 삭제

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comment "Altera FPGA firmware download module"
config ALTERA_STAPL
tristate "Altera FPGA firmware download module"
depends on I2C
default n
help
An Altera FPGA module. Say Y when you want to support this tool.

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altera-stapl-objs = altera-lpt.o altera-jtag.o altera-comp.o altera.o
obj-$(CONFIG_ALTERA_STAPL) += altera-stapl.o

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/*
* altera-comp.c
*
* altera FPGA driver
*
* Copyright (C) Altera Corporation 1998-2001
* Copyright (C) 2010 NetUP Inc.
* Copyright (C) 2010 Igor M. Liplianin <liplianin@netup.ru>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/kernel.h>
#include "altera-exprt.h"
#define SHORT_BITS 16
#define CHAR_BITS 8
#define DATA_BLOB_LENGTH 3
#define MATCH_DATA_LENGTH 8192
#define ALTERA_REQUEST_SIZE 1024
#define ALTERA_BUFFER_SIZE (MATCH_DATA_LENGTH + ALTERA_REQUEST_SIZE)
static u32 altera_bits_req(u32 n)
{
u32 result = SHORT_BITS;
if (n == 0)
result = 1;
else {
/* Look for the highest non-zero bit position */
while ((n & (1 << (SHORT_BITS - 1))) == 0) {
n <<= 1;
--result;
}
}
return result;
}
static u32 altera_read_packed(u8 *buffer, u32 bits, u32 *bits_avail,
u32 *in_index)
{
u32 result = 0;
u32 shift = 0;
u32 databyte = 0;
while (bits > 0) {
databyte = buffer[*in_index];
result |= (((databyte >> (CHAR_BITS - *bits_avail))
& (0xff >> (CHAR_BITS - *bits_avail))) << shift);
if (bits <= *bits_avail) {
result &= (0xffff >> (SHORT_BITS - (bits + shift)));
*bits_avail -= bits;
bits = 0;
} else {
++(*in_index);
shift += *bits_avail;
bits -= *bits_avail;
*bits_avail = CHAR_BITS;
}
}
return result;
}
u32 altera_shrink(u8 *in, u32 in_length, u8 *out, u32 out_length, s32 version)
{
u32 i, j, data_length = 0L;
u32 offset, length;
u32 match_data_length = MATCH_DATA_LENGTH;
u32 bits_avail = CHAR_BITS;
u32 in_index = 0L;
if (version > 0)
--match_data_length;
for (i = 0; i < out_length; ++i)
out[i] = 0;
/* Read number of bytes in data. */
for (i = 0; i < sizeof(in_length); ++i) {
data_length = data_length | (
altera_read_packed(in,
CHAR_BITS,
&bits_avail,
&in_index) << (i * CHAR_BITS));
}
if (data_length > out_length) {
data_length = 0L;
return data_length;
}
i = 0;
while (i < data_length) {
/* A 0 bit indicates literal data. */
if (altera_read_packed(in, 1, &bits_avail,
&in_index) == 0) {
for (j = 0; j < DATA_BLOB_LENGTH; ++j) {
if (i < data_length) {
out[i] = (u8)altera_read_packed(in,
CHAR_BITS,
&bits_avail,
&in_index);
i++;
}
}
} else {
/* A 1 bit indicates offset/length to follow. */
offset = altera_read_packed(in, altera_bits_req((s16)
(i > match_data_length ?
match_data_length : i)),
&bits_avail,
&in_index);
length = altera_read_packed(in, CHAR_BITS,
&bits_avail,
&in_index);
for (j = 0; j < length; ++j) {
if (i < data_length) {
out[i] = out[i - offset];
i++;
}
}
}
}
return data_length;
}

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/*
* altera-exprt.h
*
* altera FPGA driver
*
* Copyright (C) Altera Corporation 1998-2001
* Copyright (C) 2010 NetUP Inc.
* Copyright (C) 2010 Igor M. Liplianin <liplianin@netup.ru>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef ALTERA_EXPRT_H
#define ALTERA_EXPRT_H
u32 altera_shrink(u8 *in, u32 in_length, u8 *out, u32 out_length, s32 version);
int netup_jtag_io_lpt(void *device, int tms, int tdi, int read_tdo);
#endif /* ALTERA_EXPRT_H */

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/*
* altera-jtag.h
*
* altera FPGA driver
*
* Copyright (C) Altera Corporation 1998-2001
* Copyright (C) 2010 NetUP Inc.
* Copyright (C) 2010 Igor M. Liplianin <liplianin@netup.ru>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef ALTERA_JTAG_H
#define ALTERA_JTAG_H
/* Function Prototypes */
enum altera_jtag_state {
ILLEGAL_JTAG_STATE = -1,
RESET = 0,
IDLE = 1,
DRSELECT = 2,
DRCAPTURE = 3,
DRSHIFT = 4,
DREXIT1 = 5,
DRPAUSE = 6,
DREXIT2 = 7,
DRUPDATE = 8,
IRSELECT = 9,
IRCAPTURE = 10,
IRSHIFT = 11,
IREXIT1 = 12,
IRPAUSE = 13,
IREXIT2 = 14,
IRUPDATE = 15
};
struct altera_jtag {
/* Global variable to store the current JTAG state */
enum altera_jtag_state jtag_state;
/* Store current stop-state for DR and IR scan commands */
enum altera_jtag_state drstop_state;
enum altera_jtag_state irstop_state;
/* Store current padding values */
u32 dr_pre;
u32 dr_post;
u32 ir_pre;
u32 ir_post;
u32 dr_length;
u32 ir_length;
u8 *dr_pre_data;
u8 *dr_post_data;
u8 *ir_pre_data;
u8 *ir_post_data;
u8 *dr_buffer;
u8 *ir_buffer;
};
#define ALTERA_STACK_SIZE 128
#define ALTERA_MESSAGE_LENGTH 1024
struct altera_state {
struct altera_config *config;
struct altera_jtag js;
char msg_buff[ALTERA_MESSAGE_LENGTH + 1];
long stack[ALTERA_STACK_SIZE];
};
int altera_jinit(struct altera_state *astate);
int altera_set_drstop(struct altera_jtag *js, enum altera_jtag_state state);
int altera_set_irstop(struct altera_jtag *js, enum altera_jtag_state state);
int altera_set_dr_pre(struct altera_jtag *js, u32 count, u32 start_index,
u8 *preamble_data);
int altera_set_ir_pre(struct altera_jtag *js, u32 count, u32 start_index,
u8 *preamble_data);
int altera_set_dr_post(struct altera_jtag *js, u32 count, u32 start_index,
u8 *postamble_data);
int altera_set_ir_post(struct altera_jtag *js, u32 count, u32 start_index,
u8 *postamble_data);
int altera_goto_jstate(struct altera_state *astate,
enum altera_jtag_state state);
int altera_wait_cycles(struct altera_state *astate, s32 cycles,
enum altera_jtag_state wait_state);
int altera_wait_msecs(struct altera_state *astate, s32 microseconds,
enum altera_jtag_state wait_state);
int altera_irscan(struct altera_state *astate, u32 count,
u8 *tdi_data, u32 start_index);
int altera_swap_ir(struct altera_state *astate,
u32 count, u8 *in_data,
u32 in_index, u8 *out_data,
u32 out_index);
int altera_drscan(struct altera_state *astate, u32 count,
u8 *tdi_data, u32 start_index);
int altera_swap_dr(struct altera_state *astate, u32 count,
u8 *in_data, u32 in_index,
u8 *out_data, u32 out_index);
void altera_free_buffers(struct altera_state *astate);
#endif /* ALTERA_JTAG_H */

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/*
* altera-lpt.c
*
* altera FPGA driver
*
* Copyright (C) Altera Corporation 1998-2001
* Copyright (C) 2010 NetUP Inc.
* Copyright (C) 2010 Abylay Ospan <aospan@netup.ru>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/io.h>
#include <linux/kernel.h>
#include "altera-exprt.h"
static int lpt_hardware_initialized;
static void byteblaster_write(int port, int data)
{
outb((u8)data, (u16)(port + 0x378));
};
static int byteblaster_read(int port)
{
int data = 0;
data = inb((u16)(port + 0x378));
return data & 0xff;
};
int netup_jtag_io_lpt(void *device, int tms, int tdi, int read_tdo)
{
int data = 0;
int tdo = 0;
int initial_lpt_ctrl = 0;
if (!lpt_hardware_initialized) {
initial_lpt_ctrl = byteblaster_read(2);
byteblaster_write(2, (initial_lpt_ctrl | 0x02) & 0xdf);
lpt_hardware_initialized = 1;
}
data = ((tdi ? 0x40 : 0) | (tms ? 0x02 : 0));
byteblaster_write(0, data);
if (read_tdo) {
tdo = byteblaster_read(1);
tdo = ((tdo & 0x80) ? 0 : 1);
}
byteblaster_write(0, data | 0x01);
byteblaster_write(0, data);
return tdo;
}

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