ASoC: stm32: sai: add power management
Add support of low power modes to STM32 SAI driver. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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committed by
Mark Brown
parent
eddb608430
commit
cf8817733d
@@ -168,6 +168,7 @@ static bool stm32_sai_sub_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case STM_SAI_DR_REGX:
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case STM_SAI_SR_REGX:
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return true;
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default:
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return false;
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@@ -182,7 +183,6 @@ static bool stm32_sai_sub_writeable_reg(struct device *dev, unsigned int reg)
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case STM_SAI_FRCR_REGX:
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case STM_SAI_SLOTR_REGX:
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case STM_SAI_IMR_REGX:
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case STM_SAI_SR_REGX:
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case STM_SAI_CLRFR_REGX:
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case STM_SAI_DR_REGX:
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case STM_SAI_PDMCR_REGX:
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@@ -202,6 +202,7 @@ static const struct regmap_config stm32_sai_sub_regmap_config_f4 = {
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.volatile_reg = stm32_sai_sub_volatile_reg,
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.writeable_reg = stm32_sai_sub_writeable_reg,
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.fast_io = true,
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.cache_type = REGCACHE_FLAT,
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};
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static const struct regmap_config stm32_sai_sub_regmap_config_h7 = {
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@@ -213,6 +214,7 @@ static const struct regmap_config stm32_sai_sub_regmap_config_h7 = {
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.volatile_reg = stm32_sai_sub_volatile_reg,
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.writeable_reg = stm32_sai_sub_writeable_reg,
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.fast_io = true,
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.cache_type = REGCACHE_FLAT,
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};
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static int snd_pcm_iec958_info(struct snd_kcontrol *kcontrol,
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@@ -441,8 +443,8 @@ static irqreturn_t stm32_sai_isr(int irq, void *devid)
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if (!flags)
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return IRQ_NONE;
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regmap_update_bits(sai->regmap, STM_SAI_CLRFR_REGX, SAI_XCLRFR_MASK,
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SAI_XCLRFR_MASK);
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regmap_write_bits(sai->regmap, STM_SAI_CLRFR_REGX, SAI_XCLRFR_MASK,
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SAI_XCLRFR_MASK);
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if (!sai->substream) {
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dev_err(&pdev->dev, "Device stopped. Spurious IRQ 0x%x\n", sr);
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@@ -704,9 +706,8 @@ static int stm32_sai_startup(struct snd_pcm_substream *substream,
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}
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/* Enable ITs */
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regmap_update_bits(sai->regmap, STM_SAI_CLRFR_REGX,
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SAI_XCLRFR_MASK, SAI_XCLRFR_MASK);
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regmap_write_bits(sai->regmap, STM_SAI_CLRFR_REGX,
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SAI_XCLRFR_MASK, SAI_XCLRFR_MASK);
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imr = SAI_XIMR_OVRUDRIE;
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if (STM_SAI_IS_CAPTURE(sai)) {
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@@ -738,10 +739,10 @@ static int stm32_sai_set_config(struct snd_soc_dai *cpu_dai,
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* SAI fifo threshold is set to half fifo, to keep enough space
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* for DMA incoming bursts.
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*/
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regmap_update_bits(sai->regmap, STM_SAI_CR2_REGX,
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SAI_XCR2_FFLUSH | SAI_XCR2_FTH_MASK,
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SAI_XCR2_FFLUSH |
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SAI_XCR2_FTH_SET(STM_SAI_FIFO_TH_HALF));
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regmap_write_bits(sai->regmap, STM_SAI_CR2_REGX,
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SAI_XCR2_FFLUSH | SAI_XCR2_FTH_MASK,
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SAI_XCR2_FFLUSH |
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SAI_XCR2_FTH_SET(STM_SAI_FIFO_TH_HALF));
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/* DS bits in CR1 not set for SPDIF (size forced to 24 bits).*/
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if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) {
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@@ -1492,10 +1493,34 @@ static int stm32_sai_sub_probe(struct platform_device *pdev)
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int stm32_sai_sub_suspend(struct device *dev)
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{
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struct stm32_sai_sub_data *sai = dev_get_drvdata(dev);
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regcache_cache_only(sai->regmap, true);
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regcache_mark_dirty(sai->regmap);
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return 0;
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}
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static int stm32_sai_sub_resume(struct device *dev)
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{
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struct stm32_sai_sub_data *sai = dev_get_drvdata(dev);
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regcache_cache_only(sai->regmap, false);
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return regcache_sync(sai->regmap);
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}
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#endif /* CONFIG_PM_SLEEP */
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static const struct dev_pm_ops stm32_sai_sub_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_sub_suspend, stm32_sai_sub_resume)
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};
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static struct platform_driver stm32_sai_sub_driver = {
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.driver = {
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.name = "st,stm32-sai-sub",
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.of_match_table = stm32_sai_sub_ids,
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.pm = &stm32_sai_sub_pm_ops,
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},
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.probe = stm32_sai_sub_probe,
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};
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