Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Arnd Bergmann:
"New and updated SoC support. Among the things new for this release
are:
- at91: Added support for the new SAMA5D4 SoC, following the earlier
SAMA5D3
- bcm: Added support for BCM63XX family of DSL SoCs
- hisi: Added support for HiP04 server-class SoC
- meson: Initial support for the Amlogic Meson6 (aka 8726MX) platform
- shmobile: added support for new r8a7794 (R-Car E2) automotive SoC
Noteworthy changes to existing SoC support are:
- imx: convert i.MX1 to device tree
- omap: lots of power management work
- omap: base support to enable moving to standard UART driver
- shmobile: lots of progress for multiplatform support, still
ongoing"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (171 commits)
ARM: hisi: depend on ARCH_MULTI_V7
CNS3xxx: Fix debug UART.
ARM: at91: fix nommu build regression
ARM: meson: add basic support for MesonX SoCs
ARM: meson: debug: add debug UART for earlyprintk support
irq: Export handle_fasteoi_irq
ARM: mediatek: Add earlyprintk support for mt6589
ARM: hisi: Fix platmcpm compilation when ARMv6 is selected
ARM: debug: fix alphanumerical order on debug uarts
ARM: at91: document Atmel SMART compatibles
ARM: at91: add sama5d4 support to sama5_defconfig
ARM: at91: dt: add device tree file for SAMA5D4ek board
ARM: at91: dt: add device tree file for SAMA5D4 SoC
ARM: at91: SAMA5D4 SoC detection code and low level routines
ARM: at91: introduce basic SAMA5D4 support
clk: at91: add a driver for the h32mx clock
ARM: pxa3xx: provide specific platform_devices for all ssp ports
ARM: pxa: ssp: provide platform_device_id for PXA3xx
ARM: OMAP4+: Remove static iotable mappings for SRAM
ARM: OMAP4+: Move SRAM data to DT
...
This commit is contained in:
Linus Torvalds
@@ -1,6 +1,43 @@
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Atmel AT91 device tree bindings.
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================================
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Boards with a SoC of the Atmel AT91 or SMART family shall have the following
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properties:
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Required root node properties:
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compatible: must be one of:
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* "atmel,at91rm9200"
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* "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
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the specific SoC family or compatible:
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o "atmel,at91sam9260"
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o "atmel,at91sam9261"
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o "atmel,at91sam9263"
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o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
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SoC compatible:
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- "atmel,at91sam9g15"
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- "atmel,at91sam9g25"
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- "atmel,at91sam9g35"
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- "atmel,at91sam9x25"
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- "atmel,at91sam9x35"
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o "atmel,at91sam9g20"
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o "atmel,at91sam9g45"
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o "atmel,at91sam9n12"
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o "atmel,at91sam9rl"
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* "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
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SoC family:
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o "atmel,sama5d3" shall be extended with the specific SoC compatible:
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- "atmel,sama5d31"
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- "atmel,sama5d33"
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- "atmel,sama5d34"
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- "atmel,sama5d35"
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- "atmel,sama5d36"
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o "atmel,sama5d4" shall be extended with the specific SoC compatible:
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- "atmel,sama5d41"
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- "atmel,sama5d42"
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- "atmel,sama5d43"
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- "atmel,sama5d44"
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PIT Timer required properties:
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- compatible: Should be "atmel,at91sam9260-pit"
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- reg: Should contain registers location and length
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9
Documentation/devicetree/bindings/arm/bcm/bcm63138.txt
Normal file
9
Documentation/devicetree/bindings/arm/bcm/bcm63138.txt
Normal file
@@ -0,0 +1,9 @@
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Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
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-----------------------------------------------------------
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Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
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following properties:
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Required root node property:
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compatible: should be "brcm,bcm63138"
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@@ -5,6 +5,11 @@ Hi4511 Board
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Required root node properties:
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- compatible = "hisilicon,hi3620-hi4511";
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HiP04 D01 Board
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Required root node properties:
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- compatible = "hisilicon,hip04-d01";
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Hisilicon system controller
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Required properties:
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@@ -55,3 +60,21 @@ Example:
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compatible = "hisilicon,pctrl";
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reg = <0xfca09000 0x1000>;
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};
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-----------------------------------------------------------------------
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Fabric:
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Required Properties:
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- compatible: "hisilicon,hip04-fabric";
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- reg: Address and size of Fabric
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-----------------------------------------------------------------------
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Bootwrapper boot method (software protocol on SMP):
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Required Properties:
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- compatible: "hisilicon,hip04-bootwrapper";
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- boot-method: Address and size of boot method.
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[0]: bootwrapper physical address
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[1]: bootwrapper size
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[2]: relocation physical address
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[3]: relocation size
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@@ -10,6 +10,9 @@ Required properties:
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Should be "ti,omap5-mpu" for OMAP5
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- ti,hwmods: "mpu"
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Optional properties:
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- sram: Phandle to the ocmcram node
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Examples:
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- For an OMAP5 SMP system:
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@@ -0,0 +1,12 @@
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NVIDIA Tegra Flow Controller
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Required properties:
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- compatible: Should be "nvidia,tegra<chip>-flowctrl"
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- reg: Should contain one register range (address and length)
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Example:
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flow-controller@60007000 {
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compatible = "nvidia,tegra20-flowctrl";
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reg = <0x60007000 0x1000>;
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};
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@@ -74,6 +74,9 @@ Required properties:
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"atmel,at91sam9x5-clk-utmi":
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at91 utmi clock
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"atmel,sama5d4-clk-h32mx":
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at91 h32mx clock
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Required properties for SCKC node:
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- reg : defines the IO memory reserved for the SCKC.
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- #size-cells : shall be 0 (reg is used to encode clk id).
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@@ -447,3 +450,14 @@ For example:
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#clock-cells = <0>;
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clocks = <&main>;
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};
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Required properties for 32 bits bus Matrix clock (h32mx clock):
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- #clock-cells : from common clock binding; shall be set to 0.
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- clocks : shall be the master clock source phandle.
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For example:
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h32ck: h32mxck {
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#clock-cells = <0>;
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compatible = "atmel,sama5d4-clk-h32mx";
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clocks = <&mck>;
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};
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@@ -11,9 +11,11 @@ Required Properties:
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- compatible: Must be one of the following
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- "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
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- "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks
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- "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks
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- "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
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- "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
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- "renesas,sh73a0-mstp-clocks" for SH73A0 (SH-MobileAG5) MSTP gate clocks
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- "renesas,cpg-mstp-clock" for generic MSTP gate clocks
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- reg: Base address and length of the I/O mapped registers used by the MSTP
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clocks. The first register is the clock control register and is mandatory.
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@@ -0,0 +1,11 @@
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Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
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Required properties:
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- compatible: Should be 'xlnx,zynq-ddrc-a05'
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- reg: Base address and size of the controllers memory area
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Example:
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memory-controller@f8006000 {
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compatible = "xlnx,zynq-ddrc-a05";
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reg = <0xf8006000 0x1000>;
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};
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