ARM: l2x0/pl310: Refactor Kconfig to be more maintainable

Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs)
is bothersome to maintain and likely to lead to merge conflicts.

This patch moves the knowledge of which platforms have a L2x0 or
PL310 cache controller to the individual machines.  To enable this,
a new MIGHT_HAVE_CACHE_L2X0 config option is introduced to allow
machines to indicate that they may have such a cache controller
independently of each other.

Boards/SoCs which cannot reliably operate without the L2 cache
controller support will need to select CACHE_L2X0 directly from
their own Kconfigs instead.  This applies to some TrustZone-enabled
boards where Linux runs in the Normal World, for example.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
        (for cns3xxx)
Acked-by: Tony Lindgren <tony@atomide.com>
        (for omap)
Acked-by: Shawn Guo <shawn.guo@linaro.org>
        (for imx)
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
        (for exynos)
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
        (for imx)
Acked-by: Olof Johansson <olof@lixom.net>
        (for tegra)
This commit is contained in:
Dave Martin
2011-11-29 15:56:19 +00:00
förälder caca6a03d3
incheckning ce5ea9f376
7 ändrade filer med 33 tillägg och 7 borttagningar

Visa fil

@@ -816,14 +816,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
Say Y here to use the Feroceon L2 cache in writethrough mode.
Unless you specifically require this, say N for writeback mode.
config MIGHT_HAVE_CACHE_L2X0
bool
help
This option should be selected by machines which have a L2x0
or PL310 cache controller, but where its use is optional.
The only effect of this option is to make CACHE_L2X0 and
related options available to the user for configuration.
Boards or SoCs which always require the cache controller
support to be present should select CACHE_L2X0 directly
instead of this option, thus preventing the user from
inadvertently configuring a broken kernel.
config CACHE_L2X0
bool "Enable the L2x0 outer cache controller"
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
default y
bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
default MIGHT_HAVE_CACHE_L2X0
select OUTER_CACHE
select OUTER_CACHE_SYNC
help