xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

MIPS: Netlogic: Add topology.h for XLP family

Browse Source 
Add mach-netlogic/topology.h which contains XLP cpu number to core and
node mapping.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6271/
This commit is contained in:
Jayachandran C
2013-12-21 16:52:14 +05:30
committed by Ralf Baechle
parent c24a8a7a99
commit ce59d0f7fe
3 changed files with 39 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
arch/mips/include/asm/mach-netlogic/multi-node.h
View File

@@ -51,4 +51,23 @@
#define NLM_THREADS_PER_CORE 4 #define NLM_THREADS_PER_CORE 4
#define NLM_CPUS_PER_NODE (NLM_CORES_PER_NODE * NLM_THREADS_PER_CORE) #define NLM_CPUS_PER_NODE (NLM_CORES_PER_NODE * NLM_THREADS_PER_CORE)
struct nlm_soc_info {
unsigned long coremask; /* cores enabled on the soc */
unsigned long ebase; /* not used now */
uint64_t irqmask; /* EIMR for the node */
uint64_t sysbase; /* only for XLP - sys block base */
uint64_t picbase; /* PIC block base */
spinlock_t piclock; /* lock for PIC access */
cpumask_t cpumask; /* logical cpu mask for node */
};
extern struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
#define nlm_get_node(i) (&nlm_nodes[i])
#ifdef CONFIG_CPU_XLR
#define nlm_current_node() (&nlm_nodes[0])
#else
#define nlm_current_node() (&nlm_nodes[nlm_nodeid()])
#endif
void nlm_node_init(int node);
#endif #endif

20
arch/mips/include/asm/mach-netlogic/topology.h Normal file
View File

@@ -0,0 +1,20 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2013 Broadcom Corporation
*/
#ifndef _ASM_MACH_NETLOGIC_TOPOLOGY_H
#define _ASM_MACH_NETLOGIC_TOPOLOGY_H
#include <asm/mach-netlogic/multi-node.h>
#define topology_physical_package_id(cpu) cpu_to_node(cpu)
#define topology_core_id(cpu) (cpu_logical_map(cpu) / NLM_THREADS_PER_CORE)
#define topology_thread_cpumask(cpu) (&cpu_sibling_map[cpu])
#define topology_core_cpumask(cpu) cpumask_of_node(cpu_to_node(cpu))
#include <asm-generic/topology.h>
#endif /* _ASM_MACH_NETLOGIC_TOPOLOGY_H */

18
arch/mips/include/asm/netlogic/common.h
View File

@@ -84,7 +84,6 @@ nlm_set_nmi_handler(void *handler)
*/ */
void nlm_init_boot_cpu(void); void nlm_init_boot_cpu(void);
unsigned int nlm_get_cpu_frequency(void); unsigned int nlm_get_cpu_frequency(void);
void nlm_node_init(int node);
extern struct plat_smp_ops nlm_smp_ops; extern struct plat_smp_ops nlm_smp_ops;
extern char nlm_reset_entry[], nlm_reset_entry_end[]; extern char nlm_reset_entry[], nlm_reset_entry_end[];
@@ -94,22 +93,6 @@ extern struct dma_map_ops nlm_swiotlb_dma_ops;
extern unsigned int nlm_threads_per_core; extern unsigned int nlm_threads_per_core;
extern cpumask_t nlm_cpumask; extern cpumask_t nlm_cpumask;
struct nlm_soc_info {
unsigned long coremask; /* cores enabled on the soc */
unsigned long ebase;
uint64_t irqmask;
uint64_t sysbase; /* only for XLP */
uint64_t picbase;
spinlock_t piclock;
};
#define nlm_get_node(i) (&nlm_nodes[i])
#ifdef CONFIG_CPU_XLR
#define nlm_current_node() (&nlm_nodes[0])
#else
#define nlm_current_node() (&nlm_nodes[nlm_nodeid()])
#endif
struct irq_data; struct irq_data;
uint64_t nlm_pci_irqmask(int node); uint64_t nlm_pci_irqmask(int node);
void nlm_setup_pic_irq(int node, int picirq, int irq, int irt); void nlm_setup_pic_irq(int node, int picirq, int irq, int irt);
@@ -128,7 +111,6 @@ static inline int nlm_irq_to_xirq(int node, int irq)
return node * NR_IRQS / NLM_NR_NODES + irq; return node * NR_IRQS / NLM_NR_NODES + irq;
} }
extern struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
extern int nlm_cpu_ready[]; extern int nlm_cpu_ready[];
#endif #endif
#endif /* _NETLOGIC_COMMON_H_ */ #endif /* _NETLOGIC_COMMON_H_ */