Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 mm changes from Ingo Molnar: "The main change in this cycle is the rework of the TLB range flushing code, to simplify, fix and consolidate the code. By Dave Hansen" * 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mm: Set TLB flush tunable to sane value (33) x86/mm: New tunable for single vs full TLB flush x86/mm: Add tracepoints for TLB flushes x86/mm: Unify remote INVLPG code x86/mm: Fix missed global TLB flush stat x86/mm: Rip out complicated, out-of-date, buggy TLB flushing x86/mm: Clean up the TLB flushing code x86/smep: Be more informative when signalling an SMEP fault
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@@ -481,26 +481,17 @@ u16 __read_mostly tlb_lld_2m[NR_INFO];
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u16 __read_mostly tlb_lld_4m[NR_INFO];
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u16 __read_mostly tlb_lld_1g[NR_INFO];
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/*
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* tlb_flushall_shift shows the balance point in replacing cr3 write
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* with multiple 'invlpg'. It will do this replacement when
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* flush_tlb_lines <= active_lines/2^tlb_flushall_shift.
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* If tlb_flushall_shift is -1, means the replacement will be disabled.
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*/
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s8 __read_mostly tlb_flushall_shift = -1;
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void cpu_detect_tlb(struct cpuinfo_x86 *c)
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{
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if (this_cpu->c_detect_tlb)
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this_cpu->c_detect_tlb(c);
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printk(KERN_INFO "Last level iTLB entries: 4KB %d, 2MB %d, 4MB %d\n"
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"Last level dTLB entries: 4KB %d, 2MB %d, 4MB %d, 1GB %d\n"
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"tlb_flushall_shift: %d\n",
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"Last level dTLB entries: 4KB %d, 2MB %d, 4MB %d, 1GB %d\n",
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tlb_lli_4k[ENTRIES], tlb_lli_2m[ENTRIES],
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tlb_lli_4m[ENTRIES], tlb_lld_4k[ENTRIES],
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tlb_lld_2m[ENTRIES], tlb_lld_4m[ENTRIES],
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tlb_lld_1g[ENTRIES], tlb_flushall_shift);
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tlb_lld_1g[ENTRIES]);
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}
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void detect_ht(struct cpuinfo_x86 *c)
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