Merge branch 'next/pm' of git://git.linaro.org/people/arnd/arm-soc
* 'next/pm' of git://git.linaro.org/people/arnd/arm-soc: (66 commits) ARM: CSR: PM: use outer_resume to resume L2 cache ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaII ARM: OMAP: voltage: voltage layer present, even when CONFIG_PM=n ARM: CSR: PM: add sleep entry for SiRFprimaII ARM: CSR: PM: save/restore irq status in suspend cycle ARM: CSR: PM: save/restore timer status in suspend cycle OMAP4: PM: TWL6030: add cmd register OMAP4: PM: TWL6030: fix ON/RET/OFF voltages OMAP4: PM: TWL6030: address 0V conversions OMAP4: PM: TWL6030: fix uv to voltage for >0x39 OMAP4: PM: TWL6030: fix voltage conversion formula omap: voltage: add a stub header file for external/regulator use OMAP2+: VC: more registers are per-channel starting with OMAP5 OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scale OMAP3+: voltage: rename omap_voltage_get_nom_volt -> voltdm_get_voltage OMAP3+: voltdm: final removal of omap_vdd_info OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomain OMAP3+: voltage: rename scale and reset functions using voltdm_ prefix OMAP3+: VP: combine setting init voltage into common function OMAP3+: VP: remove unused omap_vp_get_curr_volt() ... Fix up trivial conflict in arch/arm/mach-prima2/l2x0.c (code removal vs edit)
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@@ -40,6 +40,17 @@
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#define SIRFSOC_TIMER_LATCH_BIT BIT(0)
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#define SIRFSOC_TIMER_REG_CNT 11
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static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
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SIRFSOC_TIMER_MATCH_0, SIRFSOC_TIMER_MATCH_1, SIRFSOC_TIMER_MATCH_2,
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SIRFSOC_TIMER_MATCH_3, SIRFSOC_TIMER_MATCH_4, SIRFSOC_TIMER_MATCH_5,
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SIRFSOC_TIMER_INT_EN, SIRFSOC_TIMER_WATCHDOG_EN, SIRFSOC_TIMER_DIV,
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SIRFSOC_TIMER_LATCHED_LO, SIRFSOC_TIMER_LATCHED_HI,
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};
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static u32 sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT];
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static void __iomem *sirfsoc_timer_base;
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static void __init sirfsoc_of_timer_map(void);
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@@ -106,6 +117,27 @@ static void sirfsoc_timer_set_mode(enum clock_event_mode mode,
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}
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}
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static void sirfsoc_clocksource_suspend(struct clocksource *cs)
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{
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int i;
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writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
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for (i = 0; i < SIRFSOC_TIMER_REG_CNT; i++)
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sirfsoc_timer_reg_val[i] = readl_relaxed(sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
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}
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static void sirfsoc_clocksource_resume(struct clocksource *cs)
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{
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int i;
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for (i = 0; i < SIRFSOC_TIMER_REG_CNT; i++)
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writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
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writel_relaxed(sirfsoc_timer_reg_val[i - 2], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
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writel_relaxed(sirfsoc_timer_reg_val[i - 1], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
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}
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static struct clock_event_device sirfsoc_clockevent = {
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.name = "sirfsoc_clockevent",
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.rating = 200,
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@@ -120,6 +152,8 @@ static struct clocksource sirfsoc_clocksource = {
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.read = sirfsoc_timer_read,
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.suspend = sirfsoc_clocksource_suspend,
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.resume = sirfsoc_clocksource_resume,
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};
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static struct irqaction sirfsoc_timer_irq = {
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