mmc: cavium: Add scatter-gather DMA support
Add Support for the scatter-gather DMA available in the ThunderX MMC units. Up to 16 DMA requests can be processed together. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@@ -377,9 +377,32 @@ static int finish_dma_single(struct cvm_mmc_host *host, struct mmc_data *data)
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return 1;
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}
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static int finish_dma_sg(struct cvm_mmc_host *host, struct mmc_data *data)
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{
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u64 fifo_cfg;
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int count;
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/* Check if there are any pending requests left */
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fifo_cfg = readq(host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));
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count = FIELD_GET(MIO_EMM_DMA_FIFO_CFG_COUNT, fifo_cfg);
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if (count)
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dev_err(host->dev, "%u requests still pending\n", count);
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data->bytes_xfered = data->blocks * data->blksz;
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data->error = 0;
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/* Clear and disable FIFO */
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writeq(BIT_ULL(16), host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));
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dma_unmap_sg(host->dev, data->sg, data->sg_len, get_dma_dir(data));
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return 1;
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}
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static int finish_dma(struct cvm_mmc_host *host, struct mmc_data *data)
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{
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return finish_dma_single(host, data);
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if (host->use_sg && data->sg_len > 1)
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return finish_dma_sg(host, data);
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else
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return finish_dma_single(host, data);
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}
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static int check_status(u64 rsp_sts)
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@@ -522,9 +545,81 @@ static u64 prepare_dma_single(struct cvm_mmc_host *host, struct mmc_data *data)
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return addr;
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}
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/*
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* Queue complete sg list into the FIFO.
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* Returns 0 on error, 1 otherwise.
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*/
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static u64 prepare_dma_sg(struct cvm_mmc_host *host, struct mmc_data *data)
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{
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struct scatterlist *sg;
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u64 fifo_cmd, addr;
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int count, i, rw;
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count = dma_map_sg(host->dev, data->sg, data->sg_len,
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get_dma_dir(data));
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if (!count)
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return 0;
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if (count > 16)
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goto error;
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/* Enable FIFO by removing CLR bit */
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writeq(0, host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));
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for_each_sg(data->sg, sg, count, i) {
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/* Program DMA address */
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addr = sg_dma_address(sg);
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if (addr & 7)
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goto error;
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writeq(addr, host->dma_base + MIO_EMM_DMA_FIFO_ADR(host));
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/*
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* If we have scatter-gather support we also have an extra
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* register for the DMA addr, so no need to check
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* host->big_dma_addr here.
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*/
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rw = (data->flags & MMC_DATA_WRITE) ? 1 : 0;
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fifo_cmd = FIELD_PREP(MIO_EMM_DMA_FIFO_CMD_RW, rw);
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/* enable interrupts on the last element */
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fifo_cmd |= FIELD_PREP(MIO_EMM_DMA_FIFO_CMD_INTDIS,
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(i + 1 == count) ? 0 : 1);
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#ifdef __LITTLE_ENDIAN
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fifo_cmd |= FIELD_PREP(MIO_EMM_DMA_FIFO_CMD_ENDIAN, 1);
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#endif
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fifo_cmd |= FIELD_PREP(MIO_EMM_DMA_FIFO_CMD_SIZE,
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sg_dma_len(sg) / 8 - 1);
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/*
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* The write copies the address and the command to the FIFO
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* and increments the FIFO's COUNT field.
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*/
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writeq(fifo_cmd, host->dma_base + MIO_EMM_DMA_FIFO_CMD(host));
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pr_debug("[%s] sg_dma_len: %u sg_elem: %d/%d\n",
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(rw) ? "W" : "R", sg_dma_len(sg), i, count);
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}
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/*
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* In difference to prepare_dma_single we don't return the
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* address here, as it would not make sense for scatter-gather.
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* The dma fixup is only required on models that don't support
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* scatter-gather, so that is not a problem.
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*/
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return 1;
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error:
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WARN_ON_ONCE(1);
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dma_unmap_sg(host->dev, data->sg, data->sg_len, get_dma_dir(data));
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/* Disable FIFO */
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writeq(BIT_ULL(16), host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));
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return 0;
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}
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static u64 prepare_dma(struct cvm_mmc_host *host, struct mmc_data *data)
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{
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return prepare_dma_single(host, data);
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if (host->use_sg && data->sg_len > 1)
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return prepare_dma_sg(host, data);
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else
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return prepare_dma_single(host, data);
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}
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static u64 prepare_ext_dma(struct mmc_host *mmc, struct mmc_request *mrq)
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@@ -940,7 +1035,10 @@ int cvm_mmc_of_slot_probe(struct device *dev, struct cvm_mmc_host *host)
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mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_POWER_OFF_CARD;
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mmc->max_segs = 1;
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if (host->use_sg)
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mmc->max_segs = 16;
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else
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mmc->max_segs = 1;
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/* DMA size field can address up to 8 MB */
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mmc->max_seg_size = 8 * 1024 * 1024;
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