ARM: s3c24xx: spi: avoid hardcoding fiq number in driver
The IRQ_EINT0 constant is a platform detail that is defined in mach/irqs.h and not visible to drivers once that header is made private. Since the same calculation already happens in s3c24xx_set_fiq, just return the value from there. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200806182059.2431-31-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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committed by
Krzysztof Kozlowski

parent
b2a587cb65
commit
cd4bd8f943
@@ -229,17 +229,6 @@ struct spi_fiq_code {
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u8 data[];
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};
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/**
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* ack_bit - turn IRQ into IRQ acknowledgement bit
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* @irq: The interrupt number
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*
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* Returns the bit to write to the interrupt acknowledge register.
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*/
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static inline u32 ack_bit(unsigned int irq)
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{
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return 1 << (irq - IRQ_EINT0);
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}
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/**
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* s3c24xx_spi_tryfiq - attempt to claim and setup FIQ for transfer
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* @hw: The hardware state.
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@@ -256,6 +245,7 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
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struct pt_regs regs;
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enum spi_fiq_mode mode;
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struct spi_fiq_code *code;
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u32 *ack_ptr = NULL;
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int ret;
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if (!hw->fiq_claimed) {
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@@ -282,8 +272,6 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
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set_fiq_regs(®s);
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if (hw->fiq_mode != mode) {
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u32 *ack_ptr;
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hw->fiq_mode = mode;
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switch (mode) {
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@@ -303,12 +291,10 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
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BUG_ON(!code);
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ack_ptr = (u32 *)&code->data[code->ack_offset];
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*ack_ptr = ack_bit(hw->irq);
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set_fiq_handler(&code->data, code->length);
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}
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s3c24xx_set_fiq(hw->irq, true);
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s3c24xx_set_fiq(hw->irq, ack_ptr, true);
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hw->fiq_mode = mode;
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hw->fiq_inuse = 1;
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