ath5k: remove double opmode definition
opmode (operating mode) was defined in struct ath5k_hw and struct ath5k_softc. remove it from ath5k_hw and use only from ath5k_softc (sc->opmode). (btw: what's the meaning of opmode when we have multiple interfaces?) Signed-off-by: Bruno Randolf <br1@einfach.org> Acked-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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committed by
John W. Linville

parent
caec9112d6
commit
ccfe5552ae
@@ -39,16 +39,16 @@
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* ath5k_hw_set_opmode - Set PCU operating mode
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*
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* @ah: The &struct ath5k_hw
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* @op_mode: &enum nl80211_iftype operating mode
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*
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* Initialize PCU for the various operating modes (AP/STA etc)
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*
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* NOTE: ah->ah_op_mode must be set before calling this.
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*/
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int ath5k_hw_set_opmode(struct ath5k_hw *ah)
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int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode)
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{
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struct ath_common *common = ath5k_hw_common(ah);
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u32 pcu_reg, beacon_reg, low_id, high_id;
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ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_MODE, "mode %d\n", op_mode);
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/* Preserve rest settings */
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pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
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@@ -61,7 +61,7 @@ int ath5k_hw_set_opmode(struct ath5k_hw *ah)
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ATH5K_TRACE(ah->ah_sc);
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switch (ah->ah_op_mode) {
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switch (op_mode) {
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case NL80211_IFTYPE_ADHOC:
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pcu_reg |= AR5K_STA_ID1_ADHOC | AR5K_STA_ID1_KEYSRCH_MODE;
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beacon_reg |= AR5K_BCR_ADHOC;
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@@ -644,7 +644,7 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
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/*
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* Set the additional timers by mode
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*/
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switch (ah->ah_op_mode) {
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switch (ah->ah_sc->opmode) {
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case NL80211_IFTYPE_MONITOR:
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case NL80211_IFTYPE_STATION:
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/* In STA mode timer1 is used as next wakeup
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@@ -681,8 +681,8 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
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* Set the beacon register and enable all timers.
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*/
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/* When in AP or Mesh Point mode zero timer0 to start TSF */
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if (ah->ah_op_mode == NL80211_IFTYPE_AP ||
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ah->ah_op_mode == NL80211_IFTYPE_MESH_POINT)
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if (ah->ah_sc->opmode == NL80211_IFTYPE_AP ||
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ah->ah_sc->opmode == NL80211_IFTYPE_MESH_POINT)
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ath5k_hw_reg_write(ah, 0, AR5K_TIMER0);
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ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
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