Merge branch 'v4.18/nand-cs-simplification' into v4.18/soc
This commit is contained in:
@@ -189,7 +189,7 @@ int davinci_aemif_setup(struct platform_device *pdev)
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* Setup Async configuration register in case we did not boot
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* from NAND and so bootloader did not bother to set it up.
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*/
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val = davinci_aemif_readl(base, A1CR_OFFSET + pdev->id * 4);
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val = davinci_aemif_readl(base, A1CR_OFFSET + pdata->core_chipsel * 4);
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/*
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* Extended Wait is not valid and Select Strobe mode is not
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* used
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@@ -198,13 +198,13 @@ int davinci_aemif_setup(struct platform_device *pdev)
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if (pdata->options & NAND_BUSWIDTH_16)
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val |= 0x1;
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davinci_aemif_writel(base, A1CR_OFFSET + pdev->id * 4, val);
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davinci_aemif_writel(base, A1CR_OFFSET + pdata->core_chipsel * 4, val);
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clkrate = clk_get_rate(clk);
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if (pdata->timing)
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ret = davinci_aemif_setup_timing(pdata->timing, base, pdev->id,
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clkrate);
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ret = davinci_aemif_setup_timing(pdata->timing, base,
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pdata->core_chipsel, clkrate);
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if (ret < 0)
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dev_dbg(&pdev->dev, "NAND timing values setup fail\n");
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@@ -310,6 +310,7 @@ static struct davinci_aemif_timing da830_evm_nandflash_timing = {
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};
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static struct davinci_nand_pdata da830_evm_nand_pdata = {
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.core_chipsel = 1,
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.parts = da830_evm_nand_partitions,
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.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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@@ -244,6 +244,7 @@ static struct davinci_aemif_timing da850_evm_nandflash_timing = {
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};
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static struct davinci_nand_pdata da850_evm_nandflash_data = {
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.core_chipsel = 1,
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.parts = da850_evm_nandflash_partition,
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.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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@@ -77,6 +77,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
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};
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static struct davinci_nand_pdata davinci_nand_data = {
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.core_chipsel = 0,
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.mask_chipsel = BIT(14),
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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@@ -72,6 +72,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
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};
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static struct davinci_nand_pdata davinci_nand_data = {
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.core_chipsel = 0,
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.mask_chipsel = BIT(14),
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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@@ -138,6 +138,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
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};
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static struct davinci_nand_pdata davinci_nand_data = {
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.core_chipsel = 0,
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.mask_chipsel = BIT(14),
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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@@ -152,6 +152,7 @@ static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
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};
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static struct davinci_nand_pdata davinci_evm_nandflash_data = {
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.core_chipsel = 0,
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.parts = davinci_evm_nandflash_partition,
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.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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@@ -84,6 +84,7 @@ static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
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};
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static struct davinci_nand_pdata davinci_nand_data = {
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.core_chipsel = 0,
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.mask_cle = 0x80000,
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.mask_ale = 0x40000,
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.parts = davinci_nand_partitions,
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@@ -400,6 +400,7 @@ static struct mtd_partition mityomapl138_nandflash_partition[] = {
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};
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static struct davinci_nand_pdata mityomapl138_nandflash_data = {
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.core_chipsel = 1,
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.parts = mityomapl138_nandflash_partition,
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.nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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@@ -87,6 +87,7 @@ static struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
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};
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static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
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.core_chipsel = 0,
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.parts = davinci_ntosd2_nandflash_partition,
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.nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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