media: use the BIT() macro

As warned by cppcheck:

	[drivers/media/dvb-frontends/cx24123.c:434]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour
	[drivers/media/pci/bt8xx/bttv-input.c:87]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour
	[drivers/media/pci/bt8xx/bttv-input.c:98]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour
			...
	[drivers/media/v4l2-core/v4l2-ioctl.c:1391]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour

There are lots of places where we're doing 1 << 31. That's bad,
as, depending on the architecture, this has an undefined behavior.

The BIT() macro is already prepared to handle this, so, let's
just switch all "1 << number" macros by BIT(number) at the header files
with has 1 << 31.

Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> # exynos4-is and s3c-camif
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> # omap3isp, vsp1, xilinx, wl128x and ipu3
Reviewed-by: Benoit Parrot <bparrot@ti.com> # am437x and ti-vpe
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Mauro Carvalho Chehab
2019-08-22 11:06:32 -03:00
parent 093347abc7
commit cce8ccca80
16 changed files with 1012 additions and 1000 deletions

View File

@@ -12,6 +12,7 @@
#ifndef __XILINX_VIP_H__
#define __XILINX_VIP_H__
#include <linux/bitops.h>
#include <linux/io.h>
#include <media/v4l2-subdev.h>
@@ -35,23 +36,23 @@ struct clk;
/* Xilinx Video IP Control Registers */
#define XVIP_CTRL_CONTROL 0x0000
#define XVIP_CTRL_CONTROL_SW_ENABLE (1 << 0)
#define XVIP_CTRL_CONTROL_REG_UPDATE (1 << 1)
#define XVIP_CTRL_CONTROL_BYPASS (1 << 4)
#define XVIP_CTRL_CONTROL_TEST_PATTERN (1 << 5)
#define XVIP_CTRL_CONTROL_FRAME_SYNC_RESET (1 << 30)
#define XVIP_CTRL_CONTROL_SW_RESET (1 << 31)
#define XVIP_CTRL_CONTROL_SW_ENABLE BIT(0)
#define XVIP_CTRL_CONTROL_REG_UPDATE BIT(1)
#define XVIP_CTRL_CONTROL_BYPASS BIT(4)
#define XVIP_CTRL_CONTROL_TEST_PATTERN BIT(5)
#define XVIP_CTRL_CONTROL_FRAME_SYNC_RESET BIT(30)
#define XVIP_CTRL_CONTROL_SW_RESET BIT(31)
#define XVIP_CTRL_STATUS 0x0004
#define XVIP_CTRL_STATUS_PROC_STARTED (1 << 0)
#define XVIP_CTRL_STATUS_EOF (1 << 1)
#define XVIP_CTRL_STATUS_PROC_STARTED BIT(0)
#define XVIP_CTRL_STATUS_EOF BIT(1)
#define XVIP_CTRL_ERROR 0x0008
#define XVIP_CTRL_ERROR_SLAVE_EOL_EARLY (1 << 0)
#define XVIP_CTRL_ERROR_SLAVE_EOL_LATE (1 << 1)
#define XVIP_CTRL_ERROR_SLAVE_SOF_EARLY (1 << 2)
#define XVIP_CTRL_ERROR_SLAVE_SOF_LATE (1 << 3)
#define XVIP_CTRL_ERROR_SLAVE_EOL_EARLY BIT(0)
#define XVIP_CTRL_ERROR_SLAVE_EOL_LATE BIT(1)
#define XVIP_CTRL_ERROR_SLAVE_SOF_EARLY BIT(2)
#define XVIP_CTRL_ERROR_SLAVE_SOF_LATE BIT(3)
#define XVIP_CTRL_IRQ_ENABLE 0x000c
#define XVIP_CTRL_IRQ_ENABLE_PROC_STARTED (1 << 0)
#define XVIP_CTRL_IRQ_EOF (1 << 1)
#define XVIP_CTRL_IRQ_ENABLE_PROC_STARTED BIT(0)
#define XVIP_CTRL_IRQ_EOF BIT(1)
#define XVIP_CTRL_VERSION 0x0010
#define XVIP_CTRL_VERSION_MAJOR_MASK (0xff << 24)
#define XVIP_CTRL_VERSION_MAJOR_SHIFT 24