drm/radeon: add dpm support for CI dGPUs (v2)
This adds dpm support for btc asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen switching Set radeon.dpm=1 to enable. v2: remove unused radeon_atombios.c changes, make missing smc ucode non-fatal Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -3663,7 +3663,7 @@ static void si_clear_vc(struct radeon_device *rdev)
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WREG32(CG_FTV, 0);
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}
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static u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
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u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
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{
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u8 mc_para_index;
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@@ -3676,7 +3676,7 @@ static u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
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return mc_para_index;
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}
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static u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode)
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u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode)
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{
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u8 mc_para_index;
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@@ -3758,9 +3758,9 @@ static bool si_validate_phase_shedding_tables(struct radeon_device *rdev,
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return true;
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}
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static void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
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u32 max_voltage_steps,
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struct atom_voltage_table *voltage_table)
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void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
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u32 max_voltage_steps,
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struct atom_voltage_table *voltage_table)
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{
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unsigned int i, diff;
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