Merge tag 'drm-next-2019-05-16' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "A bunch of fixes for the merge window closure, doesn't seem to be
  anything too major or serious in there.

  It does add TU117 turing modesetting to nouveau but it's just an
  enable for preexisting code.

  amdgpu:
   - gpu reset at load crash fix
   - ATPX hotplug fix for when dGPU is off
   - SR-IOV fixes

  radeon:
   - r5xx pll fixes

  i915:
   - GVT (MCHBAR, buffer alignment, misc warnings fixes)
   - Fixes for newly enabled semaphore code
   - Geminilake disable framebuffer compression
   - HSW edp fast modeset fix
   - IRQ vs RCU race fix

  nouveau:
   - Turing modesetting fixes
   - TU117 support

  msm:
   - SDM845 bringup fixes

  panfrost:
   - static checker fixes

  pl111:
   - spinlock init fix.

  bridge:
   - refresh rate register fix for adv7511"

* tag 'drm-next-2019-05-16' of git://anongit.freedesktop.org/drm/drm: (36 commits)
  drm/msm: Upgrade gxpd checks to IS_ERR_OR_NULL
  drm/msm/dpu: Remove duplicate header
  drm/pl111: Initialize clock spinlock early
  drm/msm: correct attempted NULL pointer dereference in debugfs
  drm/msm: remove resv fields from msm_gem_object struct
  drm/nouveau: fix duplication of nv50_head_atom struct
  drm/nouveau/disp/dp: respect sink limits when selecting failsafe link configuration
  drm/nouveau/core: initial support for boards with TU117 chipset
  drm/nouveau/core: allow detected chipset to be overridden
  drm/nouveau/kms/gf119-gp10x: push HeadSetControlOutputResource() mthd when encoders change
  drm/nouveau/kms/nv50-: fix bug preventing non-vsync'd page flips
  drm/nouveau/kms/gv100-: fix spurious window immediate interlocks
  drm/bridge: adv7511: Fix low refresh rate selection
  drm/panfrost: Add missing _fini() calls in panfrost_device_fini()
  drm/panfrost: Only put sync_out if non-NULL
  drm/i915: Seal races between async GPU cancellation, retirement and signaling
  drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder
  drm/i915/fbc: disable framebuffer compression on GeminiLake
  drm/amdgpu/psp: move psp version specific function pointers to early_init
  drm/radeon: prefer lower reference dividers
  ...

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

@@ -2540,6 +2540,41 @@ nv166_chipset = {
 	.sec2 = tu102_sec2_new,
 };
 
+static const struct nvkm_device_chip
+nv167_chipset = {
+	.name = "TU117",
+	.bar = tu102_bar_new,
+	.bios = nvkm_bios_new,
+	.bus = gf100_bus_new,
+	.devinit = tu102_devinit_new,
+	.fault = tu102_fault_new,
+	.fb = gv100_fb_new,
+	.fuse = gm107_fuse_new,
+	.gpio = gk104_gpio_new,
+	.gsp = gv100_gsp_new,
+	.i2c = gm200_i2c_new,
+	.ibus = gm200_ibus_new,
+	.imem = nv50_instmem_new,
+	.ltc = gp102_ltc_new,
+	.mc = tu102_mc_new,
+	.mmu = tu102_mmu_new,
+	.pci = gp100_pci_new,
+	.pmu = gp102_pmu_new,
+	.therm = gp100_therm_new,
+	.timer = gk20a_timer_new,
+	.top = gk104_top_new,
+	.ce[0] = tu102_ce_new,
+	.ce[1] = tu102_ce_new,
+	.ce[2] = tu102_ce_new,
+	.ce[3] = tu102_ce_new,
+	.ce[4] = tu102_ce_new,
+	.disp = tu102_disp_new,
+	.dma = gv100_dma_new,
+	.fifo = tu102_fifo_new,
+	.nvdec[0] = gp102_nvdec_new,
+	.sec2 = tu102_sec2_new,
+};
+
 static int
 nvkm_device_event_ctor(struct nvkm_object *object, void *data, u32 size,
 		       struct nvkm_notify *notify)
@@ -2824,8 +2859,8 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 	u64 mmio_base, mmio_size;
 	u32 boot0, strap;
 	void __iomem *map;
-	int ret = -EEXIST;
-	int i;
+	int ret = -EEXIST, i;
+	unsigned chipset;
 
 	mutex_lock(&nv_devices_mutex);
 	if (nvkm_device_find_locked(handle))
@@ -2870,6 +2905,26 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 		strap = ioread32_native(map + 0x101000);
 		iounmap(map);
 
+		/* chipset can be overridden for devel/testing purposes */
+		chipset = nvkm_longopt(device->cfgopt, "NvChipset", 0);
+		if (chipset) {
+			u32 override_boot0;
+
+			if (chipset >= 0x10) {
+				override_boot0  = ((chipset & 0x1ff) << 20);
+				override_boot0 |= 0x000000a1;
+			} else {
+				if (chipset != 0x04)
+					override_boot0 = 0x20104000;
+				else
+					override_boot0 = 0x20004000;
+			}
+
+			nvdev_warn(device, "CHIPSET OVERRIDE: %08x -> %08x\n",
+				   boot0, override_boot0);
+			boot0 = override_boot0;
+		}
+
 		/* determine chipset and derive architecture from it */
 		if ((boot0 & 0x1f000000) > 0) {
 			device->chipset = (boot0 & 0x1ff00000) >> 20;
@@ -2996,6 +3051,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 		case 0x162: device->chip = &nv162_chipset; break;
 		case 0x164: device->chip = &nv164_chipset; break;
 		case 0x166: device->chip = &nv166_chipset; break;
+		case 0x167: device->chip = &nv167_chipset; break;
 		default:
 			nvdev_error(device, "unknown chipset (%08x)\n", boot0);
 			goto done;

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c

@@ -365,8 +365,15 @@ nvkm_dp_train(struct nvkm_dp *dp, u32 dataKBps)
 	 * and it's better to have a failed modeset than that.
 	 */
 	for (cfg = nvkm_dp_rates; cfg->rate; cfg++) {
-		if (cfg->nr <= outp_nr && cfg->nr <= outp_bw)
-			failsafe = cfg;
+		if (cfg->nr <= outp_nr && cfg->nr <= outp_bw) {
+			/* Try to respect sink limits too when selecting
+			 * lowest link configuration.
+			 */
+			if (!failsafe ||
+			    (cfg->nr <= sink_nr && cfg->bw <= sink_bw))
+				failsafe = cfg;
+		}
+
 		if (failsafe && cfg[1].rate < dataKBps)
 			break;
 	}