Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux into next
Pull arm64 updates from Catalin Marinas: - Optimised assembly string/memory routines (based on the AArch64 Cortex Strings library contributed to glibc but re-licensed under GPLv2) - Optimised crypto algorithms making use of the ARMv8 crypto extensions (together with kernel API for using FPSIMD instructions in interrupt context) - Ftrace support - CPU topology parsing from DT - ESR_EL1 (Exception Syndrome Register) exposed to user space signal handlers for SIGSEGV/SIGBUS (useful to emulation tools like Qemu) - 1GB section linear mapping if applicable - Barriers usage clean-up - Default pgprot clean-up Conflicts as per Catalin. * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (57 commits) arm64: kernel: initialize broadcast hrtimer based clock event device arm64: ftrace: Add system call tracepoint arm64: ftrace: Add CALLER_ADDRx macros arm64: ftrace: Add dynamic ftrace support arm64: Add ftrace support ftrace: Add arm64 support to recordmcount arm64: Add 'notrace' attribute to unwind_frame() for ftrace arm64: add __ASSEMBLY__ in asm/insn.h arm64: Fix linker script entry point arm64: lib: Implement optimized string length routines arm64: lib: Implement optimized string compare routines arm64: lib: Implement optimized memcmp routine arm64: lib: Implement optimized memset routine arm64: lib: Implement optimized memmove routine arm64: lib: Implement optimized memcpy routine arm64: defconfig: enable a few more common/useful options in defconfig ftrace: Make CALLER_ADDRx macros more generic arm64: Fix deadlock scenario with smp_send_stop() arm64: Fix machine_shutdown() definition arm64: Support arch_irq_work_raise() via self IPIs ...
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@@ -35,6 +35,7 @@
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#include <linux/clockchips.h>
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#include <linux/completion.h>
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#include <linux/of.h>
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#include <linux/irq_work.h>
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#include <asm/atomic.h>
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#include <asm/cacheflush.h>
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@@ -62,6 +63,7 @@ enum ipi_msg_type {
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IPI_CALL_FUNC_SINGLE,
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IPI_CPU_STOP,
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IPI_TIMER,
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IPI_IRQ_WORK,
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};
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/*
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@@ -477,6 +479,14 @@ void arch_send_call_function_single_ipi(int cpu)
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smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
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}
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#ifdef CONFIG_IRQ_WORK
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void arch_irq_work_raise(void)
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{
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if (smp_cross_call)
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smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
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}
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#endif
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static const char *ipi_types[NR_IPI] = {
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#define S(x,s) [x - IPI_RESCHEDULE] = s
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S(IPI_RESCHEDULE, "Rescheduling interrupts"),
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@@ -484,6 +494,7 @@ static const char *ipi_types[NR_IPI] = {
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S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
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S(IPI_CPU_STOP, "CPU stop interrupts"),
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S(IPI_TIMER, "Timer broadcast interrupts"),
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S(IPI_IRQ_WORK, "IRQ work interrupts"),
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};
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void show_ipi_list(struct seq_file *p, int prec)
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@@ -576,6 +587,14 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
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break;
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#endif
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#ifdef CONFIG_IRQ_WORK
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case IPI_IRQ_WORK:
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irq_enter();
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irq_work_run();
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irq_exit();
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break;
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#endif
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default:
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pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
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break;
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