wil6210: increase RX rings and RX buff array size

In Talyn-MB, the 11ad throughput is higher and performance drops
may occur in the current RX configuration due to unavailability
of Rx buffers.
Increase the RX descriptor ring, RX status ring and number of RX
buffers to stabilize the performance in high throughput.

Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Maya Erez
2018-10-31 10:52:11 +02:00
committed by Kalle Valo
부모 d083b2e2b7
커밋 cbebe277be
4개의 변경된 파일11개의 추가작업 그리고 5개의 파일을 삭제

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@@ -81,6 +81,7 @@ static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
#define WIL_TX_Q_LEN_DEFAULT (4000)
#define WIL_RX_RING_SIZE_ORDER_DEFAULT (10)
#define WIL_RX_RING_SIZE_ORDER_TALYN_DEFAULT (11)
#define WIL_TX_RING_SIZE_ORDER_DEFAULT (12)
#define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7)
#define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */