wil6210: increase RX rings and RX buff array size
In Talyn-MB, the 11ad throughput is higher and performance drops may occur in the current RX configuration due to unavailability of Rx buffers. Increase the RX descriptor ring, RX status ring and number of RX buffers to stabilize the performance in high throughput. Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
此提交包含在:
@@ -80,7 +80,7 @@ static const struct kernel_param_ops mtu_max_ops = {
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module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444);
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MODULE_PARM_DESC(mtu_max, " Max MTU value.");
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static uint rx_ring_order = WIL_RX_RING_SIZE_ORDER_DEFAULT;
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static uint rx_ring_order;
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static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT;
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static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT;
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@@ -1684,6 +1684,11 @@ int __wil_up(struct wil6210_priv *wil)
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return rc;
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/* Rx RING. After MAC and beacon */
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if (rx_ring_order == 0)
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rx_ring_order = wil->hw_version < HW_VER_TALYN_MB ?
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WIL_RX_RING_SIZE_ORDER_DEFAULT :
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WIL_RX_RING_SIZE_ORDER_TALYN_DEFAULT;
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rc = wil->txrx_ops.rx_init(wil, 1 << rx_ring_order);
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if (rc)
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return rc;
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