Merge tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver changes from Arnd Bergmann: "These changes are mostly for ARM specific device drivers that either don't have an upstream maintainer, or that had the maintainer ask us to pick up the changes to avoid conflicts. A large chunk of this are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from that, reset controllers for STi as well as a large rework of the Marvell Orion/EBU watchdog driver are notable" * tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits) Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac." Revert "net: stmmac: Add SOCFPGA glue driver" ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks ARM: STi: Add reset controller support to mach-sti Kconfig drivers: reset: stih416: add softreset controller drivers: reset: stih415: add softreset controller drivers: reset: Reset controller driver for STiH416 drivers: reset: Reset controller driver for STiH415 drivers: reset: STi SoC system configuration reset controller support dts: socfpga: Add sysmgr node so the gmac can use to reference dts: socfpga: Add support for SD/MMC on the SOCFPGA platform reset: Add optional resets and stubs ARM: shmobile: r7s72100: fix bus clock calculation Power: Reset: Generalize qnap-poweroff to work on Synology devices. dts: socfpga: Update clock entry to support multiple parents ARM: socfpga: Update socfpga_defconfig dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. net: stmmac: Add SOCFPGA glue driver watchdog: orion_wdt: Use %pa to print 'phys_addr_t' drivers: cci: Export CCI PMU revision ...
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@@ -1,3 +1,2 @@
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void integrator_clk_init(bool is_cp);
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void integrator_impd1_clk_init(void __iomem *base, unsigned int id);
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void integrator_impd1_clk_exit(unsigned int id);
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@@ -10,6 +10,8 @@
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#ifndef _MACH_DAVINCI_AEMIF_H
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#define _MACH_DAVINCI_AEMIF_H
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#include <linux/platform_device.h>
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#define NRCSR_OFFSET 0x00
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#define AWCCR_OFFSET 0x04
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#define A1CR_OFFSET 0x10
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@@ -31,6 +33,5 @@ struct davinci_aemif_timing {
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u8 ta;
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};
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int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
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void __iomem *base, unsigned cs);
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int davinci_aemif_setup(struct platform_device *pdev);
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#endif
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