x86/cr4: Sanitize CR4.PCE update
load_mm_cr4_irqsoff() is really a strange name for a function which has only one purpose: Update the CR4.PCE bit depending on the perf state. Rename it to update_cr4_pce_mm(), move it into the tlb code and provide a function which can be invoked by the perf smp function calls. Another step to remove exposure of cpu_tlbstate. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200421092559.049499158@linutronix.de
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committed by
Borislav Petkov

parent
d8f0b35331
commit
cb2a02355b
@@ -272,6 +272,26 @@ static void cond_ibpb(struct task_struct *next)
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}
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}
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#ifdef CONFIG_PERF_EVENTS
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static inline void cr4_update_pce_mm(struct mm_struct *mm)
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{
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if (static_branch_unlikely(&rdpmc_always_available_key) ||
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(!static_branch_unlikely(&rdpmc_never_available_key) &&
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atomic_read(&mm->context.perf_rdpmc_allowed)))
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cr4_set_bits_irqsoff(X86_CR4_PCE);
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else
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cr4_clear_bits_irqsoff(X86_CR4_PCE);
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}
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void cr4_update_pce(void *ignored)
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{
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cr4_update_pce_mm(this_cpu_read(cpu_tlbstate.loaded_mm));
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}
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#else
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static inline void cr4_update_pce_mm(struct mm_struct *mm) { }
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#endif
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void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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@@ -440,7 +460,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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this_cpu_write(cpu_tlbstate.loaded_mm_asid, new_asid);
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if (next != real_prev) {
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load_mm_cr4_irqsoff(next);
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cr4_update_pce_mm(next);
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switch_ldt(real_prev, next);
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}
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}
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