usb: musb: pass configuration specifics via pdata
Use platform_data to pass musb configuration-specific details to musb driver. This patch will prevent that other platforms selecting HAVE_CLK and enabling musb won't break tree building. The other parts of it will come when linux-omap merge up more omap2/3 board-files. Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
此提交包含在：
Felipe Balbi
@@ -230,173 +230,4 @@ extern u8 tusb_get_revision(struct musb *musb);
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#define TUSB_REV_30 0x30
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#define TUSB_REV_31 0x31
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/*----------------------------------------------------------------------------*/
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#ifdef CONFIG_USB_TUSB6010
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/* configuration parameters specific to this silicon */
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/* Number of Tx endpoints. Legal values are 1 - 16 (this value includes EP0) */
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#define MUSB_C_NUM_EPT 16
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/* Number of Rx endpoints. Legal values are 1 - 16 (this value includes EP0) */
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#define MUSB_C_NUM_EPR 16
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/* Endpoint 1 to 15 direction types. C_EP1_DEF is defined if either Tx endpoint
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* 1 or Rx endpoint 1 are used.
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*/
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#define MUSB_C_EP1_DEF
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/* C_EP1_TX_DEF is defined if Tx endpoint 1 is used */
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#define MUSB_C_EP1_TX_DEF
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/* C_EP1_RX_DEF is defined if Rx endpoint 1 is used */
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#define MUSB_C_EP1_RX_DEF
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/* C_EP1_TOR_DEF is defined if Tx endpoint 1 and Rx endpoint 1 share a FIFO */
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/* #define C_EP1_TOR_DEF */
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/* C_EP1_TAR_DEF is defined if both Tx endpoint 1 and Rx endpoint 1 are used
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* and do not share a FIFO.
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*/
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#define MUSB_C_EP1_TAR_DEF
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/* Similarly for all other used endpoints */
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#define MUSB_C_EP2_DEF
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#define MUSB_C_EP2_TX_DEF
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#define MUSB_C_EP2_RX_DEF
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#define MUSB_C_EP2_TAR_DEF
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#define MUSB_C_EP3_DEF
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#define MUSB_C_EP3_TX_DEF
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#define MUSB_C_EP3_RX_DEF
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#define MUSB_C_EP3_TAR_DEF
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#define MUSB_C_EP4_DEF
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#define MUSB_C_EP4_TX_DEF
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#define MUSB_C_EP4_RX_DEF
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#define MUSB_C_EP4_TAR_DEF
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/* Endpoint 1 to 15 FIFO address bits. Legal values are 3 to 13 - corresponding
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* to FIFO sizes of 8 to 8192 bytes. If an Tx endpoint shares a FIFO with an Rx
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* endpoint then the Rx FIFO size must be the same as the Tx FIFO size. All
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* endpoints 1 to 15 must be defined, unused endpoints should be set to 2.
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*/
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#define MUSB_C_EP1T_BITS 5
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#define MUSB_C_EP1R_BITS 5
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#define MUSB_C_EP2T_BITS 5
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#define MUSB_C_EP2R_BITS 5
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#define MUSB_C_EP3T_BITS 3
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#define MUSB_C_EP3R_BITS 3
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#define MUSB_C_EP4T_BITS 3
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#define MUSB_C_EP4R_BITS 3
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#define MUSB_C_EP5T_BITS 2
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#define MUSB_C_EP5R_BITS 2
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#define MUSB_C_EP6T_BITS 2
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#define MUSB_C_EP6R_BITS 2
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#define MUSB_C_EP7T_BITS 2
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#define MUSB_C_EP7R_BITS 2
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#define MUSB_C_EP8T_BITS 2
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#define MUSB_C_EP8R_BITS 2
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#define MUSB_C_EP9T_BITS 2
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#define MUSB_C_EP9R_BITS 2
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#define MUSB_C_EP10T_BITS 2
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#define MUSB_C_EP10R_BITS 2
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#define MUSB_C_EP11T_BITS 2
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#define MUSB_C_EP11R_BITS 2
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#define MUSB_C_EP12T_BITS 2
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#define MUSB_C_EP12R_BITS 2
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#define MUSB_C_EP13T_BITS 2
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#define MUSB_C_EP13R_BITS 2
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#define MUSB_C_EP14T_BITS 2
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#define MUSB_C_EP14R_BITS 2
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#define MUSB_C_EP15T_BITS 2
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#define MUSB_C_EP15R_BITS 2
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/* Define the following constant if the USB2.0 Transceiver Macrocell data width
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* is 16-bits.
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*/
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/* #define C_UTM_16 */
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/* Define this constant if the CPU uses big-endian byte ordering. */
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/* #define C_BIGEND */
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/* Define the following constant if any Tx endpoint is required to support
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* multiple bulk packets.
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*/
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/* #define C_MP_TX */
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/* Define the following constant if any Rx endpoint is required to support
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* multiple bulk packets.
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*/
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/* #define C_MP_RX */
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/* Define the following constant if any Tx endpoint is required to support high
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* bandwidth ISO.
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*/
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/* #define C_HB_TX */
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/* Define the following constant if any Rx endpoint is required to support high
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* bandwidth ISO.
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*/
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/* #define C_HB_RX */
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/* Define the following constant if software connect/disconnect control is
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* required.
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*/
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#define MUSB_C_SOFT_CON
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/* Define the following constant if Vendor Control Registers are required. */
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/* #define C_VEND_REG */
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/* Vendor control register widths. */
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#define MUSB_C_VCTL_BITS 4
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#define MUSB_C_VSTAT_BITS 8
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/* Define the following constant to include a DMA controller. */
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/* #define C_DMA */
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/* Define the following constant if 2 or more DMA channels are required. */
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/* #define C_DMA2 */
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/* Define the following constant if 3 or more DMA channels are required. */
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/* #define C_DMA3 */
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/* Define the following constant if 4 or more DMA channels are required. */
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/* #define C_DMA4 */
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/* Define the following constant if 5 or more DMA channels are required. */
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/* #define C_DMA5 */
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/* Define the following constant if 6 or more DMA channels are required. */
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/* #define C_DMA6 */
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/* Define the following constant if 7 or more DMA channels are required. */
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/* #define C_DMA7 */
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/* Define the following constant if 8 or more DMA channels are required. */
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/* #define C_DMA8 */
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/* Enable Dynamic FIFO Sizing */
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#define MUSB_C_DYNFIFO_DEF
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/* Derived constants. The following constants are derived from the previous
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* configuration constants
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*/
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/* Total number of endpoints. Legal values are 2 - 16. This must be equal to
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* the larger of C_NUM_EPT, C_NUM_EPR
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*/
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/* #define MUSB_C_NUM_EPS 5 */
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/* C_EPMAX_BITS is equal to the largest endpoint FIFO word address bits */
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#define MUSB_C_EPMAX_BITS 11
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/* C_RAM_BITS is the number of address bits required to address the RAM (32-bit
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* addresses). It is defined as log2 of the sum of 2** of all the endpoint FIFO
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* dword address bits (rounded up).
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*/
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#define MUSB_C_RAM_BITS 12
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#endif /* CONFIG_USB_TUSB6010 */
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#endif /* __TUSB6010_H__ */
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