lightnvm: introduce mlc lower page table mappings
NAND MLC memories have both lower and upper pages. When programming, both of these must be written, before data can be read. However, these lower and upper pages might not placed at even and odd flash pages, but can be skipped. Therefore each flash memory has its lower pages defined, which can then be used when programming and to know when padding are necessary. This patch implements the lower page definition in the specification, and exposes it through a simple lookup table at dev->lptbl. Signed-off-by: Matias Bjørling <m@bjorling.me> Signed-off-by: Jens Axboe <axboe@fb.com>
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committed by
Jens Axboe

parent
f9a9995072
commit
ca5927e7ab
@@ -67,6 +67,20 @@ enum {
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NVM_ID_CAP_CMD_SUSPEND = 0x2,
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NVM_ID_CAP_SCRAMBLE = 0x4,
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NVM_ID_CAP_ENCRYPT = 0x8,
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/* Memory types */
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NVM_ID_FMTYPE_SLC = 0,
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NVM_ID_FMTYPE_MLC = 1,
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};
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struct nvm_id_lp_mlc {
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u16 num_pairs;
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u8 pairs[886];
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};
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struct nvm_id_lp_tbl {
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__u8 id[8];
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struct nvm_id_lp_mlc mlc;
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};
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struct nvm_id_group {
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@@ -89,6 +103,8 @@ struct nvm_id_group {
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u32 mpos;
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u32 mccap;
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u16 cpar;
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struct nvm_id_lp_tbl lptbl;
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};
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struct nvm_addr_format {
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@@ -297,6 +313,10 @@ struct nvm_dev {
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int sec_per_blk;
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int sec_per_lun;
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/* lower page table */
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int lps_per_blk;
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int *lptbl;
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unsigned long total_pages;
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unsigned long total_blocks;
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int nr_luns;
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