Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd
Pull MTD updates from David Woodhouse: - Various cleanups especially in NAND tests - Add support for NAND flash on BCMA bus - DT support for sh_flctl and denali NAND drivers - Kill obsolete/superceded drivers (fortunet, nomadik_nand) - Fix JFFS2 locking bug in ENOMEM failure path - New SPI flash chips, as usual - Support writing in 'reliable mode' for DiskOnChip G4 - Debugfs support in nandsim * tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits) mtd: nand: typo in nand_id_has_period() comments mtd: nand/gpio: use io{read,write}*_rep accessors mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited. mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems mtd: nand/docg4: fix and improve read of factory bbt mtd: nand/docg4: reserve bb marker area in ecclayout mtd: nand/docg4: add support for writing in reliable mode mtd: mxc_nand: reorder part_probes to let cmdline override other sources mtd: mxc_nand: fix unbalanced clk_disable() in error path mtd: nandsim: Introduce debugfs infrastructure mtd: physmap_of: error checking to prevent a NULL pointer dereference mtg: docg3: potential divide by zero in doc_write_oob() mtd: bcm47xxnflash: writing support mtd: tests/read: initialize buffer for whole next page mtd: at91: atmel_nand: return bit flips for the PMECC read_page() mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c mtd: nand: onfi need to be probed in 8 bits mode mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width mtd: nand: print flash size during detection mted: nand_wait_ready timeout fix ...
This commit is contained in:
@@ -350,6 +350,7 @@ extern void bcma_core_set_clockmode(struct bcma_device *core,
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enum bcma_clkmode clkmode);
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extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
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bool on);
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extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset);
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#define BCMA_DMA_TRANSLATION_MASK 0xC0000000
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#define BCMA_DMA_TRANSLATION_NONE 0x00000000
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#define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
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@@ -23,6 +23,7 @@
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#include <linux/mutex.h>
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#include <linux/kref.h>
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#include <linux/sysfs.h>
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#include <linux/workqueue.h>
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struct hd_geometry;
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struct mtd_info;
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@@ -43,7 +44,8 @@ struct mtd_blktrans_dev {
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struct kref ref;
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struct gendisk *disk;
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struct attribute_group *disk_attributes;
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struct task_struct *thread;
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struct workqueue_struct *wq;
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struct work_struct work;
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struct request_queue *rq;
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spinlock_t queue_lock;
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void *priv;
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@@ -92,12 +92,26 @@
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* Others use readb/writeb
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*/
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#if defined(__arm__)
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#define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2))))
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#define WriteDOC_(d, adr, reg) do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d; wmb();} while(0)
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static inline u8 ReadDOC_(u32 __iomem *addr, unsigned long reg)
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{
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return __raw_readl(addr + reg);
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}
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static inline void WriteDOC_(u8 data, u32 __iomem *addr, unsigned long reg)
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{
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__raw_writel(data, addr + reg);
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wmb();
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}
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#define DOC_IOREMAP_LEN 0x8000
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#elif defined(__ppc__)
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#define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1))))
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#define WriteDOC_(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d; wmb();} while(0)
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static inline u8 ReadDOC_(u16 __iomem *addr, unsigned long reg)
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{
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return __raw_readw(addr + reg);
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}
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static inline void WriteDOC_(u8 data, u16 __iomem *addr, unsigned long reg)
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{
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__raw_writew(data, addr + reg);
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wmb();
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}
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#define DOC_IOREMAP_LEN 0x4000
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#else
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#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg))
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@@ -155,9 +155,6 @@ struct fsmc_nand_platform_data {
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unsigned int width;
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unsigned int bank;
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/* CLE, ALE offsets */
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unsigned int cle_off;
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unsigned int ale_off;
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enum access_mode mode;
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void (*select_bank)(uint32_t bank, uint32_t busw);
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@@ -1,68 +0,0 @@
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/*
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* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef __MACH_MXS_GPMI_NAND_H__
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#define __MACH_MXS_GPMI_NAND_H__
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/* The size of the resources is fixed. */
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#define GPMI_NAND_RES_SIZE 6
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/* Resource names for the GPMI NAND driver. */
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#define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
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#define GPMI_NAND_GPMI_INTERRUPT_RES_NAME "GPMI NAND GPMI Interrupt"
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#define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch"
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#define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch"
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#define GPMI_NAND_DMA_CHANNELS_RES_NAME "GPMI NAND DMA Channels"
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#define GPMI_NAND_DMA_INTERRUPT_RES_NAME "gpmi-dma"
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/**
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* struct gpmi_nand_platform_data - GPMI NAND driver platform data.
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*
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* This structure communicates platform-specific information to the GPMI NAND
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* driver that can't be expressed as resources.
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*
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* @platform_init: A pointer to a function the driver will call to
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* initialize the platform (e.g., set up the pin mux).
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* @min_prop_delay_in_ns: Minimum propagation delay of GPMI signals to and
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* from the NAND Flash device, in nanoseconds.
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* @max_prop_delay_in_ns: Maximum propagation delay of GPMI signals to and
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* from the NAND Flash device, in nanoseconds.
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* @max_chip_count: The maximum number of chips for which the driver
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* should configure the hardware. This value most
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* likely reflects the number of pins that are
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* connected to a NAND Flash device. If this is
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* greater than the SoC hardware can support, the
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* driver will print a message and fail to initialize.
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* @partitions: An optional pointer to an array of partition
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* descriptions.
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* @partition_count: The number of elements in the partitions array.
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*/
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struct gpmi_nand_platform_data {
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/* SoC hardware information. */
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int (*platform_init)(void);
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/* NAND Flash information. */
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unsigned int min_prop_delay_in_ns;
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unsigned int max_prop_delay_in_ns;
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unsigned int max_chip_count;
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/* Medium information. */
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struct mtd_partition *partitions;
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unsigned partition_count;
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};
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#endif
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@@ -328,7 +328,7 @@ static inline int map_word_bitsset(struct map_info *map, map_word val1, map_word
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static inline map_word map_word_load(struct map_info *map, const void *ptr)
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{
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map_word r;
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map_word r = {{0} };
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if (map_bankwidth_is_1(map))
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r.x[0] = *(unsigned char *)ptr;
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@@ -391,7 +391,7 @@ static inline map_word map_word_ff(struct map_info *map)
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static inline map_word inline_map_read(struct map_info *map, unsigned long ofs)
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{
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map_word r;
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map_word uninitialized_var(r);
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if (map_bankwidth_is_1(map))
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r.x[0] = __raw_readb(map->virt + ofs);
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@@ -98,7 +98,7 @@ struct mtd_oob_ops {
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};
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#define MTD_MAX_OOBFREE_ENTRIES_LARGE 32
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#define MTD_MAX_ECCPOS_ENTRIES_LARGE 448
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#define MTD_MAX_ECCPOS_ENTRIES_LARGE 640
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/*
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* Internal ECC layout control structure. For historical reasons, there is a
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* similar, smaller struct nand_ecclayout_user (in mtd-abi.h) that is retained
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@@ -219,6 +219,13 @@ typedef enum {
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#define NAND_OWN_BUFFERS 0x00020000
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/* Chip may not exist, so silence any errors in scan */
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#define NAND_SCAN_SILENT_NODEV 0x00040000
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/*
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* Autodetect nand buswidth with readid/onfi.
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* This suppose the driver will configure the hardware in 8 bits mode
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* when calling nand_scan_ident, and update its configuration
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* before calling nand_scan_tail.
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*/
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#define NAND_BUSWIDTH_AUTO 0x00080000
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/* Options set by nand scan */
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/* Nand scan has allocated controller struct */
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@@ -471,8 +478,8 @@ struct nand_buffers {
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* non 0 if ONFI supported.
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* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
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* supported, 0 otherwise.
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* @onfi_set_features [REPLACEABLE] set the features for ONFI nand
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* @onfi_get_features [REPLACEABLE] get the features for ONFI nand
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* @onfi_set_features: [REPLACEABLE] set the features for ONFI nand
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* @onfi_get_features: [REPLACEABLE] get the features for ONFI nand
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* @ecclayout: [REPLACEABLE] the default ECC placement scheme
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* @bbt: [INTERN] bad block table pointer
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* @bbt_td: [REPLACEABLE] bad block table descriptor for flash
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@@ -20,6 +20,7 @@
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#ifndef __SH_FLCTL_H__
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#define __SH_FLCTL_H__
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#include <linux/completion.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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@@ -107,6 +108,7 @@
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#define ESTERINTE (0x1 << 24) /* ECC error interrupt enable */
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#define AC1CLR (0x1 << 19) /* ECC FIFO clear */
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#define AC0CLR (0x1 << 18) /* Data FIFO clear */
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#define DREQ0EN (0x1 << 16) /* FLDTFIFODMA Request Enable */
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#define ECERB (0x1 << 9) /* ECC error */
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#define STERB (0x1 << 8) /* Status error */
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#define STERINTE (0x1 << 4) /* Status error enable */
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@@ -138,6 +140,8 @@ enum flctl_ecc_res_t {
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FL_TIMEOUT
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};
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struct dma_chan;
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struct sh_flctl {
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struct mtd_info mtd;
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struct nand_chip chip;
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@@ -147,7 +151,7 @@ struct sh_flctl {
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uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
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int read_bytes;
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int index;
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unsigned int index;
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int seqin_column; /* column in SEQIN cmd */
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int seqin_page_addr; /* page_addr in SEQIN cmd */
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uint32_t seqin_read_cmd; /* read cmd in SEQIN cmd */
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@@ -161,6 +165,11 @@ struct sh_flctl {
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unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */
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unsigned holden:1; /* Hardware has FLHOLDCR and HOLDEN is set */
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unsigned qos_request:1; /* QoS request to prevent deep power shutdown */
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/* DMA related objects */
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struct dma_chan *chan_fifo0_rx;
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struct dma_chan *chan_fifo0_tx;
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struct completion dma_complete;
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};
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struct sh_flctl_platform_data {
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@@ -170,6 +179,9 @@ struct sh_flctl_platform_data {
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unsigned has_hwecc:1;
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unsigned use_holden:1;
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unsigned int slave_id_fifo0_tx;
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unsigned int slave_id_fifo0_rx;
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};
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static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo)
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@@ -1,16 +0,0 @@
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#ifndef __ASM_ARCH_NAND_H
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#define __ASM_ARCH_NAND_H
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struct nomadik_nand_platform_data {
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struct mtd_partition *parts;
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int nparts;
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int options;
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int (*init) (void);
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int (*exit) (void);
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};
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#define NAND_IO_DATA 0x40000000
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#define NAND_IO_CMD 0x40800000
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#define NAND_IO_ADDR 0x41000000
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#endif /* __ASM_ARCH_NAND_H */
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