drm/radeon/si: implement get_current_sclk/mclk
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -6993,3 +6993,39 @@ void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
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current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1);
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}
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}
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u32 si_dpm_get_current_sclk(struct radeon_device *rdev)
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{
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struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
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struct radeon_ps *rps = &eg_pi->current_rps;
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struct ni_ps *ps = ni_get_ps(rps);
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struct rv7xx_pl *pl;
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u32 current_index =
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(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >>
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CURRENT_STATE_INDEX_SHIFT;
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if (current_index >= ps->performance_level_count) {
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return 0;
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} else {
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pl = &ps->performance_levels[current_index];
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return pl->sclk;
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}
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}
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u32 si_dpm_get_current_mclk(struct radeon_device *rdev)
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{
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struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
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struct radeon_ps *rps = &eg_pi->current_rps;
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struct ni_ps *ps = ni_get_ps(rps);
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struct rv7xx_pl *pl;
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u32 current_index =
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(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >>
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CURRENT_STATE_INDEX_SHIFT;
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if (current_index >= ps->performance_level_count) {
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return 0;
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} else {
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pl = &ps->performance_levels[current_index];
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return pl->mclk;
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}
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}
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