powerpc/83xx: Add USB Host/Gadget support for MPC8360E-MDS boards
- Update the device tree per QE USB bindings; - Add timer (FSL GTM) node; - Add gpio-controller node for BCSR13 bank (GPIOs on that bank are used to control the USB transceiver); - Set up other BCSR registers; - Configure the QE Par IO. The work is loosely based on Li Yang's patch[1], which was used to support peripheral mode only. [1] http://ozlabs.org/pipermail/linuxppc-dev/2008-August/061357.html The s-o-b line of the original patch preserved here. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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committed by
Kumar Gala

parent
3d64de9c50
commit
c9c5e52d44
@@ -69,8 +69,18 @@
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};
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bcsr@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8360mds-bcsr";
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reg = <1 0 0x8000>;
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ranges = <0 1 0 0x8000>;
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bcsr13: gpio-controller@d {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8360mds-bcsr-gpio";
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reg = <0xd 1>;
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gpio-controller;
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};
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};
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};
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@@ -195,10 +205,21 @@
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};
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par_io@1400 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x1400 0x100>;
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ranges = <0 0x1400 0x100>;
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device_type = "par_io";
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num-ports = <7>;
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qe_pio_b: gpio-controller@18 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8360-qe-pario-bank",
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"fsl,mpc8323-qe-pario-bank";
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reg = <0x18 0x18>;
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gpio-controller;
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};
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pio1: ucc_pin@01 {
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pio-map = <
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/* port pin dir open_drain assignment has_irq */
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@@ -282,6 +303,15 @@
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};
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};
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timer@440 {
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compatible = "fsl,mpc8360-qe-gtm",
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"fsl,qe-gtm", "fsl,gtm";
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reg = <0x440 0x40>;
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clock-frequency = <132000000>;
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interrupts = <12 13 14 15>;
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interrupt-parent = <&qeic>;
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};
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spi@4c0 {
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cell-index = <0>;
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compatible = "fsl,spi";
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@@ -301,11 +331,20 @@
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};
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usb@6c0 {
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compatible = "qe_udc";
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compatible = "fsl,mpc8360-qe-usb",
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"fsl,mpc8323-qe-usb";
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reg = <0x6c0 0x40 0x8b00 0x100>;
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interrupts = <11>;
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interrupt-parent = <&qeic>;
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mode = "slave";
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fsl,fullspeed-clock = "clk21";
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fsl,lowspeed-clock = "brg9";
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gpios = <&qe_pio_b 2 0 /* USBOE */
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&qe_pio_b 3 0 /* USBTP */
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&qe_pio_b 8 0 /* USBTN */
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&qe_pio_b 9 0 /* USBRP */
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&qe_pio_b 11 0 /* USBRN */
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&bcsr13 5 0 /* SPEED */
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&bcsr13 4 1>; /* POWER */
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};
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enet0: ucc@2000 {
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