net/mlx4_en: Fix wrong indication of Wake-on-LAN (WoL) support
Currently when WoL is supported but disabled, ethtool reports:
"Supports Wake-on: d".
Fix the indication of Wol support, so that the indication
remains "g" all the time if the NIC supports WoL.
Tested:
As accepted, when NIC supports WoL- ethtool reports:
Supports Wake-on: g
Wake-on: d
when NIC doesn't support WoL- ethtool reports:
Supports Wake-on: d
Wake-on: d
Fixes: 14c07b1358
("mlx4: Wake on LAN support")
Signed-off-by: Inbar Karmy <inbark@mellanox.com>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:

committed by
David S. Miller

parent
9075bd206c
commit
c994f778bb
@@ -223,6 +223,7 @@ static void mlx4_en_get_wol(struct net_device *netdev,
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struct ethtool_wolinfo *wol)
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struct ethtool_wolinfo *wol)
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{
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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struct mlx4_caps *caps = &priv->mdev->dev->caps;
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int err = 0;
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int err = 0;
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u64 config = 0;
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u64 config = 0;
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u64 mask;
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u64 mask;
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@@ -235,24 +236,24 @@ static void mlx4_en_get_wol(struct net_device *netdev,
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mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
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mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
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MLX4_DEV_CAP_FLAG_WOL_PORT2;
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MLX4_DEV_CAP_FLAG_WOL_PORT2;
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if (!(priv->mdev->dev->caps.flags & mask)) {
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if (!(caps->flags & mask)) {
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wol->supported = 0;
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wol->supported = 0;
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wol->wolopts = 0;
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wol->wolopts = 0;
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return;
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return;
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}
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}
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if (caps->wol_port[priv->port])
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wol->supported = WAKE_MAGIC;
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else
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wol->supported = 0;
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err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
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err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
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if (err) {
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if (err) {
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en_err(priv, "Failed to get WoL information\n");
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en_err(priv, "Failed to get WoL information\n");
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return;
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return;
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}
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}
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if (config & MLX4_EN_WOL_MAGIC)
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if ((config & MLX4_EN_WOL_ENABLED) && (config & MLX4_EN_WOL_MAGIC))
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wol->supported = WAKE_MAGIC;
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else
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wol->supported = 0;
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if (config & MLX4_EN_WOL_ENABLED)
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wol->wolopts = WAKE_MAGIC;
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wol->wolopts = WAKE_MAGIC;
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else
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else
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wol->wolopts = 0;
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wol->wolopts = 0;
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@@ -764,6 +764,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
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#define QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET 0x3e
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#define QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET 0x3e
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#define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f
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#define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f
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#define QUERY_DEV_CAP_EXT_FLAGS_OFFSET 0x40
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#define QUERY_DEV_CAP_EXT_FLAGS_OFFSET 0x40
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#define QUERY_DEV_CAP_WOL_OFFSET 0x43
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#define QUERY_DEV_CAP_FLAGS_OFFSET 0x44
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#define QUERY_DEV_CAP_FLAGS_OFFSET 0x44
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#define QUERY_DEV_CAP_RSVD_UAR_OFFSET 0x48
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#define QUERY_DEV_CAP_RSVD_UAR_OFFSET 0x48
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#define QUERY_DEV_CAP_UAR_SZ_OFFSET 0x49
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#define QUERY_DEV_CAP_UAR_SZ_OFFSET 0x49
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@@ -920,6 +921,9 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
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MLX4_GET(ext_flags, outbox, QUERY_DEV_CAP_EXT_FLAGS_OFFSET);
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MLX4_GET(ext_flags, outbox, QUERY_DEV_CAP_EXT_FLAGS_OFFSET);
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MLX4_GET(flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET);
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MLX4_GET(flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET);
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dev_cap->flags = flags | (u64)ext_flags << 32;
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dev_cap->flags = flags | (u64)ext_flags << 32;
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MLX4_GET(field, outbox, QUERY_DEV_CAP_WOL_OFFSET);
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dev_cap->wol_port[1] = !!(field & 0x20);
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dev_cap->wol_port[2] = !!(field & 0x40);
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MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_UAR_OFFSET);
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MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_UAR_OFFSET);
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dev_cap->reserved_uars = field >> 4;
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dev_cap->reserved_uars = field >> 4;
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MLX4_GET(field, outbox, QUERY_DEV_CAP_UAR_SZ_OFFSET);
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MLX4_GET(field, outbox, QUERY_DEV_CAP_UAR_SZ_OFFSET);
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@@ -129,6 +129,7 @@ struct mlx4_dev_cap {
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u32 dmfs_high_rate_qpn_range;
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u32 dmfs_high_rate_qpn_range;
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struct mlx4_rate_limit_caps rl_caps;
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struct mlx4_rate_limit_caps rl_caps;
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struct mlx4_port_cap port_cap[MLX4_MAX_PORTS + 1];
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struct mlx4_port_cap port_cap[MLX4_MAX_PORTS + 1];
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bool wol_port[MLX4_MAX_PORTS + 1];
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};
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};
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struct mlx4_func_cap {
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struct mlx4_func_cap {
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@@ -424,6 +424,8 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
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dev->caps.stat_rate_support = dev_cap->stat_rate_support;
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dev->caps.stat_rate_support = dev_cap->stat_rate_support;
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dev->caps.max_gso_sz = dev_cap->max_gso_sz;
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dev->caps.max_gso_sz = dev_cap->max_gso_sz;
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dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz;
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dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz;
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dev->caps.wol_port[1] = dev_cap->wol_port[1];
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dev->caps.wol_port[2] = dev_cap->wol_port[2];
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/* Save uar page shift */
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/* Save uar page shift */
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if (!mlx4_is_slave(dev)) {
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if (!mlx4_is_slave(dev)) {
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@@ -620,6 +620,7 @@ struct mlx4_caps {
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u32 dmfs_high_rate_qpn_base;
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u32 dmfs_high_rate_qpn_base;
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u32 dmfs_high_rate_qpn_range;
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u32 dmfs_high_rate_qpn_range;
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u32 vf_caps;
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u32 vf_caps;
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bool wol_port[MLX4_MAX_PORTS + 1];
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struct mlx4_rate_limit_caps rl_caps;
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struct mlx4_rate_limit_caps rl_caps;
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};
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};
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