iwlwifi: refactor NIC init sequence
The typical sequence of setting INIT_DONE and then waiting for clock stabilisation is going to need a new workarounds, so first of all refactor it. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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committed by
Luca Coelho

parent
b8a7547d77
commit
c96b5eec21
@@ -92,26 +92,9 @@ int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
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iwl_pcie_apm_config(trans);
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/*
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* Set "initialization complete" bit to move adapter from
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* D0U* --> D0A* (powered-up active) state.
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*/
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iwl_set_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_init_done));
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/*
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* Wait for clock stabilization; once stabilized, access to
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* device-internal resources is supported, e.g. iwl_write_prph()
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* and accesses to uCode SRAM.
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*/
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ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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25000);
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if (ret < 0) {
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IWL_DEBUG_INFO(trans, "Failed to init the card\n");
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ret = iwl_finish_nic_init(trans);
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if (ret)
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return ret;
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}
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set_bit(STATUS_DEVICE_ENABLED, &trans->status);
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@@ -364,26 +364,9 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
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if (trans->cfg->base_params->pll_cfg)
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iwl_set_bit(trans, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
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/*
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* Set "initialization complete" bit to move adapter from
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* D0U* --> D0A* (powered-up active) state.
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*/
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iwl_set_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_init_done));
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/*
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* Wait for clock stabilization; once stabilized, access to
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* device-internal resources is supported, e.g. iwl_write_prph()
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* and accesses to uCode SRAM.
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*/
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ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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25000);
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if (ret < 0) {
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IWL_ERR(trans, "Failed to init the card\n");
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ret = iwl_finish_nic_init(trans);
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if (ret)
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return ret;
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}
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if (trans->cfg->host_interrupt_operation_mode) {
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/*
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@@ -453,23 +436,8 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
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iwl_trans_pcie_sw_reset(trans);
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/*
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* Set "initialization complete" bit to move adapter from
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* D0U* --> D0A* (powered-up active) state.
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*/
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iwl_set_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_init_done));
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/*
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* Wait for clock stabilization; once stabilized, access to
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* device-internal resources is possible.
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*/
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ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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25000);
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if (WARN_ON(ret < 0)) {
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IWL_ERR(trans, "Access time out - failed to enable LP XTAL\n");
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ret = iwl_finish_nic_init(trans);
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if (WARN_ON(ret)) {
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/* Release XTAL ON request */
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__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_XTAL_ON);
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@@ -1558,20 +1526,10 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
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iwl_set_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_mac_access_req));
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iwl_set_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_init_done));
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if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
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udelay(2);
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ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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25000);
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if (ret < 0) {
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IWL_ERR(trans, "Failed to resume the device (mac ready)\n");
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ret = iwl_finish_nic_init(trans);
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if (ret)
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return ret;
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}
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/*
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* Reconfigure IVAR table in case of MSIX or reset ict table in
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@@ -3521,18 +3479,9 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
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* in-order to recognize C step driver should read chip version
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* id located at the AUX bus MISC address space.
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*/
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iwl_set_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_init_done));
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udelay(2);
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ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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BIT(trans->cfg->csr->flag_mac_clock_ready),
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25000);
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if (ret < 0) {
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IWL_DEBUG_INFO(trans, "Failed to wake up the nic\n");
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ret = iwl_finish_nic_init(trans);
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if (ret)
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goto out_no_pci;
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}
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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u32 hw_step;
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