Merge tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.1: - Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is going to be used on more SoCs than just i.MX8MQ. - Add power domain information into SCU bindings document. - Add support of start/stop a CPU into imx firmware driver. - Support multiple address ranges per child node for imx-weim bus driver. * tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: firmware: imx: Add support to start/stop a CPU soc: imx: Break dependency on SOC_IMX8MQ for GPCv2 firmware: imx: scu-pd: add fallback compatible string support dt-bindings: fsl: scu: add imx8qm scu power domain support dt-bindings: fsl: scu: add fallback compatible string for power domain bus: imx-weim: guard against timing configuration conflicts bus: imx-weim: support multiple address ranges per child node dt-bindings: bus: imx-weim: document multiple address ranges per child node soc: imx: gpcv2: handle reset clocks soc: imx: gpcv2: handle additional power-down bits in handshake register Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@@ -58,7 +58,11 @@ This binding for the SCU power domain providers uses the generic power
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domain binding[2].
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Required properties:
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- compatible: Should be "fsl,imx8qxp-scu-pd".
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- compatible: Should be one of:
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"fsl,imx8qm-scu-pd",
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"fsl,imx8qxp-scu-pd"
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followed by "fsl,scu-pd"
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- #power-domain-cells: Must be 1. Contains the Resource ID used by
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SCU commands.
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See detailed Resource ID list from:
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@@ -154,7 +158,7 @@ firmware {
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};
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pd: imx8qx-pd {
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compatible = "fsl,imx8qxp-scu-pd";
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compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
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#power-domain-cells = <1>;
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};
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@@ -47,9 +47,9 @@ Optional properties:
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Timing property for child nodes. It is mandatory, not optional.
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- fsl,weim-cs-timing: The timing array, contains timing values for the
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child node. We can get the CS index from the child
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node's "reg" property. The number of registers depends
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on the selected chip.
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child node. We get the CS indexes from the address
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ranges in the child node's "reg" property.
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The number of registers depends on the selected chip:
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For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
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registers: CSxU, CSxL.
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For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
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@@ -80,3 +80,29 @@ Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
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0x0000c000 0x1404a38e 0x00000000>;
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};
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};
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Example for an imx6q-based board, a multi-chipselect device connected to WEIM:
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In this case, both chip select 0 and 1 will be configured with the same timing
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array values.
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weim: weim@21b8000 {
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compatible = "fsl,imx6q-weim";
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reg = <0x021b8000 0x4000>;
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clocks = <&clks 196>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x08000000 0x02000000
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1 0 0x0a000000 0x02000000
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2 0 0x0c000000 0x02000000
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3 0 0x0e000000 0x02000000>;
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fsl,weim-cs-gpr = <&gpr>;
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acme@0 {
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compatible = "acme,whatever";
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reg = <0 0 0x100>, <0 0x400000 0x800>,
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<1 0x400000 0x800>;
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fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
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0x00000000 0xa0000240 0x00000000>;
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};
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};
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@@ -32,6 +32,9 @@ Required properties:
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Optional properties:
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- power-supply: Power supply used to power the domain
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- clocks: a number of phandles to clocks that need to be enabled during
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domain power-up sequencing to ensure reset propagation into devices
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located inside this power domain
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Example:
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