Merge 5.10.64 into android12-5.10-lts

Changes in 5.10.64
	igmp: Add ip_mc_list lock in ip_check_mc_rcu
	USB: serial: mos7720: improve OOM-handling in read_mos_reg()
	net: ll_temac: Remove left-over debug message
	mm/page_alloc: speed up the iteration of max_order
	net: kcov: don't select SKB_EXTENSIONS when there is no NET
	serial: 8250: 8250_omap: Fix unused variable warning
	net: linux/skbuff.h: combine SKB_EXTENSIONS + KCOV handling
	tty: drop termiox user definitions
	Revert "r8169: avoid link-up interrupt issue on RTL8106e if user enables ASPM"
	x86/events/amd/iommu: Fix invalid Perf result due to IOMMU PMC power-gating
	blk-mq: fix kernel panic during iterating over flush request
	blk-mq: fix is_flush_rq
	netfilter: nftables: avoid potential overflows on 32bit arches
	netfilter: nf_tables: initialize set before expression setup
	netfilter: nftables: clone set element expression template
	blk-mq: clearing flush request reference in tags->rqs[]
	ALSA: usb-audio: Add registration quirk for JBL Quantum 800
	usb: host: xhci-rcar: Don't reload firmware after the completion
	usb: gadget: tegra-xudc: fix the wrong mult value for HS isoc or intr
	usb: mtu3: restore HS function when set SS/SSP
	usb: mtu3: use @mult for HS isoc or intr
	usb: mtu3: fix the wrong HS mult value
	xhci: fix even more unsafe memory usage in xhci tracing
	xhci: fix unsafe memory usage in xhci tracing
	x86/reboot: Limit Dell Optiplex 990 quirk to early BIOS versions
	PCI: Call Max Payload Size-related fixup quirks early
	Linux 5.10.64

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I2269075a6d5eb6121b6e42a28d4f3fd0c252695c
This commit is contained in:
Greg Kroah-Hartman
2021-09-12 09:17:13 +02:00
28 changed files with 217 additions and 172 deletions

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@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
VERSION = 5 VERSION = 5
PATCHLEVEL = 10 PATCHLEVEL = 10
SUBLEVEL = 63 SUBLEVEL = 64
EXTRAVERSION = EXTRAVERSION =
NAME = Dare mighty things NAME = Dare mighty things

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@@ -18,8 +18,6 @@
#include "../perf_event.h" #include "../perf_event.h"
#include "iommu.h" #include "iommu.h"
#define COUNTER_SHIFT 16
/* iommu pmu conf masks */ /* iommu pmu conf masks */
#define GET_CSOURCE(x) ((x)->conf & 0xFFULL) #define GET_CSOURCE(x) ((x)->conf & 0xFFULL)
#define GET_DEVID(x) (((x)->conf >> 8) & 0xFFFFULL) #define GET_DEVID(x) (((x)->conf >> 8) & 0xFFFFULL)
@@ -285,22 +283,31 @@ static void perf_iommu_start(struct perf_event *event, int flags)
WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE)); WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
hwc->state = 0; hwc->state = 0;
/*
* To account for power-gating, which prevents write to
* the counter, we need to enable the counter
* before setting up counter register.
*/
perf_iommu_enable_event(event);
if (flags & PERF_EF_RELOAD) { if (flags & PERF_EF_RELOAD) {
u64 prev_raw_count = local64_read(&hwc->prev_count); u64 count = 0;
struct amd_iommu *iommu = perf_event_2_iommu(event); struct amd_iommu *iommu = perf_event_2_iommu(event);
/*
* Since the IOMMU PMU only support counting mode,
* the counter always start with value zero.
*/
amd_iommu_pc_set_reg(iommu, hwc->iommu_bank, hwc->iommu_cntr, amd_iommu_pc_set_reg(iommu, hwc->iommu_bank, hwc->iommu_cntr,
IOMMU_PC_COUNTER_REG, &prev_raw_count); IOMMU_PC_COUNTER_REG, &count);
} }
perf_iommu_enable_event(event);
perf_event_update_userpage(event); perf_event_update_userpage(event);
} }
static void perf_iommu_read(struct perf_event *event) static void perf_iommu_read(struct perf_event *event)
{ {
u64 count, prev, delta; u64 count;
struct hw_perf_event *hwc = &event->hw; struct hw_perf_event *hwc = &event->hw;
struct amd_iommu *iommu = perf_event_2_iommu(event); struct amd_iommu *iommu = perf_event_2_iommu(event);
@@ -311,14 +318,11 @@ static void perf_iommu_read(struct perf_event *event)
/* IOMMU pc counter register is only 48 bits */ /* IOMMU pc counter register is only 48 bits */
count &= GENMASK_ULL(47, 0); count &= GENMASK_ULL(47, 0);
prev = local64_read(&hwc->prev_count); /*
if (local64_cmpxchg(&hwc->prev_count, prev, count) != prev) * Since the counter always start with value zero,
return; * simply just accumulate the count for the event.
*/
/* Handle 48-bit counter overflow */ local64_add(count, &event->count);
delta = (count << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
delta >>= COUNTER_SHIFT;
local64_add(delta, &event->count);
} }
static void perf_iommu_stop(struct perf_event *event, int flags) static void perf_iommu_stop(struct perf_event *event, int flags)
@@ -328,15 +332,16 @@ static void perf_iommu_stop(struct perf_event *event, int flags)
if (hwc->state & PERF_HES_UPTODATE) if (hwc->state & PERF_HES_UPTODATE)
return; return;
/*
* To account for power-gating, in which reading the counter would
* return zero, we need to read the register before disabling.
*/
perf_iommu_read(event);
hwc->state |= PERF_HES_UPTODATE;
perf_iommu_disable_event(event); perf_iommu_disable_event(event);
WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED); WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
hwc->state |= PERF_HES_STOPPED; hwc->state |= PERF_HES_STOPPED;
if (hwc->state & PERF_HES_UPTODATE)
return;
perf_iommu_read(event);
hwc->state |= PERF_HES_UPTODATE;
} }
static int perf_iommu_add(struct perf_event *event, int flags) static int perf_iommu_add(struct perf_event *event, int flags)

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@@ -388,10 +388,11 @@ static const struct dmi_system_id reboot_dmi_table[] __initconst = {
}, },
{ /* Handle problems with rebooting on the OptiPlex 990. */ { /* Handle problems with rebooting on the OptiPlex 990. */
.callback = set_pci_reboot, .callback = set_pci_reboot,
.ident = "Dell OptiPlex 990", .ident = "Dell OptiPlex 990 BIOS A0x",
.matches = { .matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"), DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"),
DMI_MATCH(DMI_BIOS_VERSION, "A0"),
}, },
}, },
{ /* Handle problems with rebooting on Dell 300's */ { /* Handle problems with rebooting on Dell 300's */

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@@ -120,7 +120,6 @@ void blk_rq_init(struct request_queue *q, struct request *rq)
rq->internal_tag = BLK_MQ_NO_TAG; rq->internal_tag = BLK_MQ_NO_TAG;
rq->start_time_ns = ktime_get_ns(); rq->start_time_ns = ktime_get_ns();
rq->part = NULL; rq->part = NULL;
refcount_set(&rq->ref, 1);
blk_crypto_rq_set_defaults(rq); blk_crypto_rq_set_defaults(rq);
} }
EXPORT_SYMBOL(blk_rq_init); EXPORT_SYMBOL(blk_rq_init);

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@@ -263,6 +263,11 @@ static void flush_end_io(struct request *flush_rq, blk_status_t error)
spin_unlock_irqrestore(&fq->mq_flush_lock, flags); spin_unlock_irqrestore(&fq->mq_flush_lock, flags);
} }
bool is_flush_rq(struct request *rq)
{
return rq->end_io == flush_end_io;
}
/** /**
* blk_kick_flush - consider issuing flush request * blk_kick_flush - consider issuing flush request
* @q: request_queue being kicked * @q: request_queue being kicked
@@ -330,6 +335,14 @@ static void blk_kick_flush(struct request_queue *q, struct blk_flush_queue *fq,
flush_rq->rq_flags |= RQF_FLUSH_SEQ; flush_rq->rq_flags |= RQF_FLUSH_SEQ;
flush_rq->rq_disk = first_rq->rq_disk; flush_rq->rq_disk = first_rq->rq_disk;
flush_rq->end_io = flush_end_io; flush_rq->end_io = flush_end_io;
/*
* Order WRITE ->end_io and WRITE rq->ref, and its pair is the one
* implied in refcount_inc_not_zero() called from
* blk_mq_find_and_get_req(), which orders WRITE/READ flush_rq->ref
* and READ flush_rq->end_io
*/
smp_wmb();
refcount_set(&flush_rq->ref, 1);
blk_flush_queue_rq(flush_rq, false); blk_flush_queue_rq(flush_rq, false);
} }

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@@ -933,7 +933,7 @@ static bool blk_mq_req_expired(struct request *rq, unsigned long *next)
void blk_mq_put_rq_ref(struct request *rq) void blk_mq_put_rq_ref(struct request *rq)
{ {
if (is_flush_rq(rq, rq->mq_hctx)) if (is_flush_rq(rq))
rq->end_io(rq, 0); rq->end_io(rq, 0);
else if (refcount_dec_and_test(&rq->ref)) else if (refcount_dec_and_test(&rq->ref))
__blk_mq_free_request(rq); __blk_mq_free_request(rq);

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@@ -44,11 +44,7 @@ static inline void __blk_get_queue(struct request_queue *q)
kobject_get(&q->kobj); kobject_get(&q->kobj);
} }
static inline bool bool is_flush_rq(struct request *req);
is_flush_rq(struct request *req, struct blk_mq_hw_ctx *hctx)
{
return hctx->fq->flush_rq == req;
}
struct blk_flush_queue *blk_alloc_flush_queue(int node, int cmd_size, struct blk_flush_queue *blk_alloc_flush_queue(int node, int cmd_size,
gfp_t flags); gfp_t flags);

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@@ -3547,6 +3547,7 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp)
rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000); rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000);
rtl_pcie_state_l2l3_disable(tp); rtl_pcie_state_l2l3_disable(tp);
rtl_hw_aspm_clkreq_enable(tp, true);
} }
DECLARE_RTL_COND(rtl_mac_ocp_e00e_cond) DECLARE_RTL_COND(rtl_mac_ocp_e00e_cond)

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@@ -942,10 +942,8 @@ temac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
wmb(); wmb();
lp->dma_out(lp, TX_TAILDESC_PTR, tail_p); /* DMA start */ lp->dma_out(lp, TX_TAILDESC_PTR, tail_p); /* DMA start */
if (temac_check_tx_bd_space(lp, MAX_SKB_FRAGS + 1)) { if (temac_check_tx_bd_space(lp, MAX_SKB_FRAGS + 1))
netdev_info(ndev, "%s -> netif_stop_queue\n", __func__);
netif_stop_queue(ndev); netif_stop_queue(ndev);
}
return NETDEV_TX_OK; return NETDEV_TX_OK;
} }

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@@ -3246,12 +3246,12 @@ static void fixup_mpss_256(struct pci_dev *dev)
{ {
dev->pcie_mpss = 1; /* 256 bytes */ dev->pcie_mpss = 1; /* 256 bytes */
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SOLARFLARE, DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SOLARFLARE,
PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0, fixup_mpss_256); PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0, fixup_mpss_256);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SOLARFLARE, DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SOLARFLARE,
PCI_DEVICE_ID_SOLARFLARE_SFC4000A_1, fixup_mpss_256); PCI_DEVICE_ID_SOLARFLARE_SFC4000A_1, fixup_mpss_256);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SOLARFLARE, DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SOLARFLARE,
PCI_DEVICE_ID_SOLARFLARE_SFC4000B, fixup_mpss_256); PCI_DEVICE_ID_SOLARFLARE_SFC4000B, fixup_mpss_256);
/* /*
* Intel 5000 and 5100 Memory controllers have an erratum with read completion * Intel 5000 and 5100 Memory controllers have an erratum with read completion

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@@ -538,6 +538,11 @@ static void omap_8250_pm(struct uart_port *port, unsigned int state,
static void omap_serial_fill_features_erratas(struct uart_8250_port *up, static void omap_serial_fill_features_erratas(struct uart_8250_port *up,
struct omap8250_priv *priv) struct omap8250_priv *priv)
{ {
const struct soc_device_attribute k3_soc_devices[] = {
{ .family = "AM65X", },
{ .family = "J721E", .revision = "SR1.0" },
{ /* sentinel */ }
};
u32 mvr, scheme; u32 mvr, scheme;
u16 revision, major, minor; u16 revision, major, minor;
@@ -585,6 +590,14 @@ static void omap_serial_fill_features_erratas(struct uart_8250_port *up,
default: default:
break; break;
} }
/*
* AM65x SR1.0, AM65x SR2.0 and J721e SR1.0 don't
* don't have RHR_IT_DIS bit in IER2 register. So drop to flag
* to enable errata workaround.
*/
if (soc_device_match(k3_soc_devices))
priv->habit &= ~UART_HAS_RHR_IT_DIS;
} }
static void omap8250_uart_qos_work(struct work_struct *work) static void omap8250_uart_qos_work(struct work_struct *work)
@@ -1208,12 +1221,6 @@ static int omap8250_no_handle_irq(struct uart_port *port)
return 0; return 0;
} }
static const struct soc_device_attribute k3_soc_devices[] = {
{ .family = "AM65X", },
{ .family = "J721E", .revision = "SR1.0" },
{ /* sentinel */ }
};
static struct omap8250_dma_params am654_dma = { static struct omap8250_dma_params am654_dma = {
.rx_size = SZ_2K, .rx_size = SZ_2K,
.rx_trigger = 1, .rx_trigger = 1,
@@ -1419,13 +1426,6 @@ static int omap8250_probe(struct platform_device *pdev)
up.dma->rxconf.src_maxburst = RX_TRIGGER; up.dma->rxconf.src_maxburst = RX_TRIGGER;
up.dma->txconf.dst_maxburst = TX_TRIGGER; up.dma->txconf.dst_maxburst = TX_TRIGGER;
} }
/*
* AM65x SR1.0, AM65x SR2.0 and J721e SR1.0 don't
* don't have RHR_IT_DIS bit in IER2 register
*/
if (soc_device_match(k3_soc_devices))
priv->habit &= ~UART_HAS_RHR_IT_DIS;
} }
#endif #endif
ret = serial8250_register_8250_port(&up); ret = serial8250_register_8250_port(&up);

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@@ -1610,7 +1610,7 @@ static void tegra_xudc_ep_context_setup(struct tegra_xudc_ep *ep)
u16 maxpacket, maxburst = 0, esit = 0; u16 maxpacket, maxburst = 0, esit = 0;
u32 val; u32 val;
maxpacket = usb_endpoint_maxp(desc) & 0x7ff; maxpacket = usb_endpoint_maxp(desc);
if (xudc->gadget.speed == USB_SPEED_SUPER) { if (xudc->gadget.speed == USB_SPEED_SUPER) {
if (!usb_endpoint_xfer_control(desc)) if (!usb_endpoint_xfer_control(desc))
maxburst = comp_desc->bMaxBurst; maxburst = comp_desc->bMaxBurst;
@@ -1621,7 +1621,7 @@ static void tegra_xudc_ep_context_setup(struct tegra_xudc_ep *ep)
(usb_endpoint_xfer_int(desc) || (usb_endpoint_xfer_int(desc) ||
usb_endpoint_xfer_isoc(desc))) { usb_endpoint_xfer_isoc(desc))) {
if (xudc->gadget.speed == USB_SPEED_HIGH) { if (xudc->gadget.speed == USB_SPEED_HIGH) {
maxburst = (usb_endpoint_maxp(desc) >> 11) & 0x3; maxburst = usb_endpoint_maxp_mult(desc) - 1;
if (maxburst == 0x3) { if (maxburst == 0x3) {
dev_warn(xudc->dev, dev_warn(xudc->dev,
"invalid endpoint maxburst\n"); "invalid endpoint maxburst\n");

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@@ -198,12 +198,13 @@ static void xhci_ring_dump_segment(struct seq_file *s,
int i; int i;
dma_addr_t dma; dma_addr_t dma;
union xhci_trb *trb; union xhci_trb *trb;
char str[XHCI_MSG_MAX];
for (i = 0; i < TRBS_PER_SEGMENT; i++) { for (i = 0; i < TRBS_PER_SEGMENT; i++) {
trb = &seg->trbs[i]; trb = &seg->trbs[i];
dma = seg->dma + i * sizeof(*trb); dma = seg->dma + i * sizeof(*trb);
seq_printf(s, "%pad: %s\n", &dma, seq_printf(s, "%pad: %s\n", &dma,
xhci_decode_trb(le32_to_cpu(trb->generic.field[0]), xhci_decode_trb(str, XHCI_MSG_MAX, le32_to_cpu(trb->generic.field[0]),
le32_to_cpu(trb->generic.field[1]), le32_to_cpu(trb->generic.field[1]),
le32_to_cpu(trb->generic.field[2]), le32_to_cpu(trb->generic.field[2]),
le32_to_cpu(trb->generic.field[3]))); le32_to_cpu(trb->generic.field[3])));
@@ -260,11 +261,13 @@ static int xhci_slot_context_show(struct seq_file *s, void *unused)
struct xhci_slot_ctx *slot_ctx; struct xhci_slot_ctx *slot_ctx;
struct xhci_slot_priv *priv = s->private; struct xhci_slot_priv *priv = s->private;
struct xhci_virt_device *dev = priv->dev; struct xhci_virt_device *dev = priv->dev;
char str[XHCI_MSG_MAX];
xhci = hcd_to_xhci(bus_to_hcd(dev->udev->bus)); xhci = hcd_to_xhci(bus_to_hcd(dev->udev->bus));
slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx); slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
seq_printf(s, "%pad: %s\n", &dev->out_ctx->dma, seq_printf(s, "%pad: %s\n", &dev->out_ctx->dma,
xhci_decode_slot_context(le32_to_cpu(slot_ctx->dev_info), xhci_decode_slot_context(str,
le32_to_cpu(slot_ctx->dev_info),
le32_to_cpu(slot_ctx->dev_info2), le32_to_cpu(slot_ctx->dev_info2),
le32_to_cpu(slot_ctx->tt_info), le32_to_cpu(slot_ctx->tt_info),
le32_to_cpu(slot_ctx->dev_state))); le32_to_cpu(slot_ctx->dev_state)));
@@ -280,6 +283,7 @@ static int xhci_endpoint_context_show(struct seq_file *s, void *unused)
struct xhci_ep_ctx *ep_ctx; struct xhci_ep_ctx *ep_ctx;
struct xhci_slot_priv *priv = s->private; struct xhci_slot_priv *priv = s->private;
struct xhci_virt_device *dev = priv->dev; struct xhci_virt_device *dev = priv->dev;
char str[XHCI_MSG_MAX];
xhci = hcd_to_xhci(bus_to_hcd(dev->udev->bus)); xhci = hcd_to_xhci(bus_to_hcd(dev->udev->bus));
@@ -287,7 +291,8 @@ static int xhci_endpoint_context_show(struct seq_file *s, void *unused)
ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
dma = dev->out_ctx->dma + (ep_index + 1) * CTX_SIZE(xhci->hcc_params); dma = dev->out_ctx->dma + (ep_index + 1) * CTX_SIZE(xhci->hcc_params);
seq_printf(s, "%pad: %s\n", &dma, seq_printf(s, "%pad: %s\n", &dma,
xhci_decode_ep_context(le32_to_cpu(ep_ctx->ep_info), xhci_decode_ep_context(str,
le32_to_cpu(ep_ctx->ep_info),
le32_to_cpu(ep_ctx->ep_info2), le32_to_cpu(ep_ctx->ep_info2),
le64_to_cpu(ep_ctx->deq), le64_to_cpu(ep_ctx->deq),
le32_to_cpu(ep_ctx->tx_info))); le32_to_cpu(ep_ctx->tx_info)));
@@ -341,9 +346,10 @@ static int xhci_portsc_show(struct seq_file *s, void *unused)
{ {
struct xhci_port *port = s->private; struct xhci_port *port = s->private;
u32 portsc; u32 portsc;
char str[XHCI_MSG_MAX];
portsc = readl(port->addr); portsc = readl(port->addr);
seq_printf(s, "%s\n", xhci_decode_portsc(portsc)); seq_printf(s, "%s\n", xhci_decode_portsc(str, portsc));
return 0; return 0;
} }

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@@ -134,6 +134,13 @@ static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
const struct soc_device_attribute *attr; const struct soc_device_attribute *attr;
const char *firmware_name; const char *firmware_name;
/*
* According to the datasheet, "Upon the completion of FW Download,
* there is no need to write or reload FW".
*/
if (readl(regs + RCAR_USB3_DL_CTRL) & RCAR_USB3_DL_CTRL_FW_SUCCESS)
return 0;
attr = soc_device_match(rcar_quirks_match); attr = soc_device_match(rcar_quirks_match);
if (attr) if (attr)
quirks = (uintptr_t)attr->data; quirks = (uintptr_t)attr->data;

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@@ -1214,6 +1214,7 @@ void xhci_stop_endpoint_command_watchdog(struct timer_list *t)
struct xhci_hcd *xhci = ep->xhci; struct xhci_hcd *xhci = ep->xhci;
unsigned long flags; unsigned long flags;
u32 usbsts; u32 usbsts;
char str[XHCI_MSG_MAX];
spin_lock_irqsave(&xhci->lock, flags); spin_lock_irqsave(&xhci->lock, flags);
@@ -1227,7 +1228,7 @@ void xhci_stop_endpoint_command_watchdog(struct timer_list *t)
usbsts = readl(&xhci->op_regs->status); usbsts = readl(&xhci->op_regs->status);
xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n"); xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
xhci_warn(xhci, "USBSTS:%s\n", xhci_decode_usbsts(usbsts)); xhci_warn(xhci, "USBSTS:%s\n", xhci_decode_usbsts(str, usbsts));
ep->ep_state &= ~EP_STOP_CMD_PENDING; ep->ep_state &= ~EP_STOP_CMD_PENDING;

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@@ -25,8 +25,6 @@
#include "xhci.h" #include "xhci.h"
#include "xhci-dbgcap.h" #include "xhci-dbgcap.h"
#define XHCI_MSG_MAX 500
DECLARE_EVENT_CLASS(xhci_log_msg, DECLARE_EVENT_CLASS(xhci_log_msg,
TP_PROTO(struct va_format *vaf), TP_PROTO(struct va_format *vaf),
TP_ARGS(vaf), TP_ARGS(vaf),
@@ -122,6 +120,7 @@ DECLARE_EVENT_CLASS(xhci_log_trb,
__field(u32, field1) __field(u32, field1)
__field(u32, field2) __field(u32, field2)
__field(u32, field3) __field(u32, field3)
__dynamic_array(char, str, XHCI_MSG_MAX)
), ),
TP_fast_assign( TP_fast_assign(
__entry->type = ring->type; __entry->type = ring->type;
@@ -131,7 +130,7 @@ DECLARE_EVENT_CLASS(xhci_log_trb,
__entry->field3 = le32_to_cpu(trb->field[3]); __entry->field3 = le32_to_cpu(trb->field[3]);
), ),
TP_printk("%s: %s", xhci_ring_type_string(__entry->type), TP_printk("%s: %s", xhci_ring_type_string(__entry->type),
xhci_decode_trb(__entry->field0, __entry->field1, xhci_decode_trb(__get_str(str), XHCI_MSG_MAX, __entry->field0, __entry->field1,
__entry->field2, __entry->field3) __entry->field2, __entry->field3)
) )
); );
@@ -323,6 +322,7 @@ DECLARE_EVENT_CLASS(xhci_log_ep_ctx,
__field(u32, info2) __field(u32, info2)
__field(u64, deq) __field(u64, deq)
__field(u32, tx_info) __field(u32, tx_info)
__dynamic_array(char, str, XHCI_MSG_MAX)
), ),
TP_fast_assign( TP_fast_assign(
__entry->info = le32_to_cpu(ctx->ep_info); __entry->info = le32_to_cpu(ctx->ep_info);
@@ -330,8 +330,8 @@ DECLARE_EVENT_CLASS(xhci_log_ep_ctx,
__entry->deq = le64_to_cpu(ctx->deq); __entry->deq = le64_to_cpu(ctx->deq);
__entry->tx_info = le32_to_cpu(ctx->tx_info); __entry->tx_info = le32_to_cpu(ctx->tx_info);
), ),
TP_printk("%s", xhci_decode_ep_context(__entry->info, TP_printk("%s", xhci_decode_ep_context(__get_str(str),
__entry->info2, __entry->deq, __entry->tx_info) __entry->info, __entry->info2, __entry->deq, __entry->tx_info)
) )
); );
@@ -368,6 +368,7 @@ DECLARE_EVENT_CLASS(xhci_log_slot_ctx,
__field(u32, info2) __field(u32, info2)
__field(u32, tt_info) __field(u32, tt_info)
__field(u32, state) __field(u32, state)
__dynamic_array(char, str, XHCI_MSG_MAX)
), ),
TP_fast_assign( TP_fast_assign(
__entry->info = le32_to_cpu(ctx->dev_info); __entry->info = le32_to_cpu(ctx->dev_info);
@@ -375,9 +376,9 @@ DECLARE_EVENT_CLASS(xhci_log_slot_ctx,
__entry->tt_info = le64_to_cpu(ctx->tt_info); __entry->tt_info = le64_to_cpu(ctx->tt_info);
__entry->state = le32_to_cpu(ctx->dev_state); __entry->state = le32_to_cpu(ctx->dev_state);
), ),
TP_printk("%s", xhci_decode_slot_context(__entry->info, TP_printk("%s", xhci_decode_slot_context(__get_str(str),
__entry->info2, __entry->tt_info, __entry->info, __entry->info2,
__entry->state) __entry->tt_info, __entry->state)
) )
); );
@@ -432,12 +433,13 @@ DECLARE_EVENT_CLASS(xhci_log_ctrl_ctx,
TP_STRUCT__entry( TP_STRUCT__entry(
__field(u32, drop) __field(u32, drop)
__field(u32, add) __field(u32, add)
__dynamic_array(char, str, XHCI_MSG_MAX)
), ),
TP_fast_assign( TP_fast_assign(
__entry->drop = le32_to_cpu(ctrl_ctx->drop_flags); __entry->drop = le32_to_cpu(ctrl_ctx->drop_flags);
__entry->add = le32_to_cpu(ctrl_ctx->add_flags); __entry->add = le32_to_cpu(ctrl_ctx->add_flags);
), ),
TP_printk("%s", xhci_decode_ctrl_ctx(__entry->drop, __entry->add) TP_printk("%s", xhci_decode_ctrl_ctx(__get_str(str), __entry->drop, __entry->add)
) )
); );
@@ -523,6 +525,7 @@ DECLARE_EVENT_CLASS(xhci_log_portsc,
TP_STRUCT__entry( TP_STRUCT__entry(
__field(u32, portnum) __field(u32, portnum)
__field(u32, portsc) __field(u32, portsc)
__dynamic_array(char, str, XHCI_MSG_MAX)
), ),
TP_fast_assign( TP_fast_assign(
__entry->portnum = portnum; __entry->portnum = portnum;
@@ -530,7 +533,7 @@ DECLARE_EVENT_CLASS(xhci_log_portsc,
), ),
TP_printk("port-%d: %s", TP_printk("port-%d: %s",
__entry->portnum, __entry->portnum,
xhci_decode_portsc(__entry->portsc) xhci_decode_portsc(__get_str(str), __entry->portsc)
) )
); );
@@ -555,13 +558,14 @@ DECLARE_EVENT_CLASS(xhci_log_doorbell,
TP_STRUCT__entry( TP_STRUCT__entry(
__field(u32, slot) __field(u32, slot)
__field(u32, doorbell) __field(u32, doorbell)
__dynamic_array(char, str, XHCI_MSG_MAX)
), ),
TP_fast_assign( TP_fast_assign(
__entry->slot = slot; __entry->slot = slot;
__entry->doorbell = doorbell; __entry->doorbell = doorbell;
), ),
TP_printk("Ring doorbell for %s", TP_printk("Ring doorbell for %s",
xhci_decode_doorbell(__entry->slot, __entry->doorbell) xhci_decode_doorbell(__get_str(str), __entry->slot, __entry->doorbell)
) )
); );

View File

@@ -23,6 +23,9 @@
#include "xhci-ext-caps.h" #include "xhci-ext-caps.h"
#include "pci-quirks.h" #include "pci-quirks.h"
/* max buffer size for trace and debug messages */
#define XHCI_MSG_MAX 500
/* xHCI PCI Configuration Registers */ /* xHCI PCI Configuration Registers */
#define XHCI_SBRN_OFFSET (0x60) #define XHCI_SBRN_OFFSET (0x60)
@@ -2297,15 +2300,14 @@ static inline char *xhci_slot_state_string(u32 state)
} }
} }
static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2, static inline const char *xhci_decode_trb(char *str, size_t size,
u32 field3) u32 field0, u32 field1, u32 field2, u32 field3)
{ {
static char str[256];
int type = TRB_FIELD_TO_TYPE(field3); int type = TRB_FIELD_TO_TYPE(field3);
switch (type) { switch (type) {
case TRB_LINK: case TRB_LINK:
sprintf(str, snprintf(str, size,
"LINK %08x%08x intr %d type '%s' flags %c:%c:%c:%c", "LINK %08x%08x intr %d type '%s' flags %c:%c:%c:%c",
field1, field0, GET_INTR_TARGET(field2), field1, field0, GET_INTR_TARGET(field2),
xhci_trb_type_string(type), xhci_trb_type_string(type),
@@ -2322,7 +2324,7 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
case TRB_HC_EVENT: case TRB_HC_EVENT:
case TRB_DEV_NOTE: case TRB_DEV_NOTE:
case TRB_MFINDEX_WRAP: case TRB_MFINDEX_WRAP:
sprintf(str, snprintf(str, size,
"TRB %08x%08x status '%s' len %d slot %d ep %d type '%s' flags %c:%c", "TRB %08x%08x status '%s' len %d slot %d ep %d type '%s' flags %c:%c",
field1, field0, field1, field0,
xhci_trb_comp_code_string(GET_COMP_CODE(field2)), xhci_trb_comp_code_string(GET_COMP_CODE(field2)),
@@ -2335,7 +2337,8 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
break; break;
case TRB_SETUP: case TRB_SETUP:
sprintf(str, "bRequestType %02x bRequest %02x wValue %02x%02x wIndex %02x%02x wLength %d length %d TD size %d intr %d type '%s' flags %c:%c:%c", snprintf(str, size,
"bRequestType %02x bRequest %02x wValue %02x%02x wIndex %02x%02x wLength %d length %d TD size %d intr %d type '%s' flags %c:%c:%c",
field0 & 0xff, field0 & 0xff,
(field0 & 0xff00) >> 8, (field0 & 0xff00) >> 8,
(field0 & 0xff000000) >> 24, (field0 & 0xff000000) >> 24,
@@ -2352,7 +2355,8 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_DATA: case TRB_DATA:
sprintf(str, "Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c", snprintf(str, size,
"Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c",
field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2), field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
GET_INTR_TARGET(field2), GET_INTR_TARGET(field2),
xhci_trb_type_string(type), xhci_trb_type_string(type),
@@ -2365,7 +2369,8 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_STATUS: case TRB_STATUS:
sprintf(str, "Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c", snprintf(str, size,
"Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c",
field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2), field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
GET_INTR_TARGET(field2), GET_INTR_TARGET(field2),
xhci_trb_type_string(type), xhci_trb_type_string(type),
@@ -2378,7 +2383,7 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
case TRB_ISOC: case TRB_ISOC:
case TRB_EVENT_DATA: case TRB_EVENT_DATA:
case TRB_TR_NOOP: case TRB_TR_NOOP:
sprintf(str, snprintf(str, size,
"Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c:%c", "Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c:%c",
field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2), field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
GET_INTR_TARGET(field2), GET_INTR_TARGET(field2),
@@ -2395,21 +2400,21 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
case TRB_CMD_NOOP: case TRB_CMD_NOOP:
case TRB_ENABLE_SLOT: case TRB_ENABLE_SLOT:
sprintf(str, snprintf(str, size,
"%s: flags %c", "%s: flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_DISABLE_SLOT: case TRB_DISABLE_SLOT:
case TRB_NEG_BANDWIDTH: case TRB_NEG_BANDWIDTH:
sprintf(str, snprintf(str, size,
"%s: slot %d flags %c", "%s: slot %d flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
TRB_TO_SLOT_ID(field3), TRB_TO_SLOT_ID(field3),
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_ADDR_DEV: case TRB_ADDR_DEV:
sprintf(str, snprintf(str, size,
"%s: ctx %08x%08x slot %d flags %c:%c", "%s: ctx %08x%08x slot %d flags %c:%c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field1, field0, field1, field0,
@@ -2418,7 +2423,7 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_CONFIG_EP: case TRB_CONFIG_EP:
sprintf(str, snprintf(str, size,
"%s: ctx %08x%08x slot %d flags %c:%c", "%s: ctx %08x%08x slot %d flags %c:%c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field1, field0, field1, field0,
@@ -2427,7 +2432,7 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_EVAL_CONTEXT: case TRB_EVAL_CONTEXT:
sprintf(str, snprintf(str, size,
"%s: ctx %08x%08x slot %d flags %c", "%s: ctx %08x%08x slot %d flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field1, field0, field1, field0,
@@ -2435,7 +2440,7 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_RESET_EP: case TRB_RESET_EP:
sprintf(str, snprintf(str, size,
"%s: ctx %08x%08x slot %d ep %d flags %c:%c", "%s: ctx %08x%08x slot %d ep %d flags %c:%c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field1, field0, field1, field0,
@@ -2456,7 +2461,7 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_SET_DEQ: case TRB_SET_DEQ:
sprintf(str, snprintf(str, size,
"%s: deq %08x%08x stream %d slot %d ep %d flags %c", "%s: deq %08x%08x stream %d slot %d ep %d flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field1, field0, field1, field0,
@@ -2467,14 +2472,14 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_RESET_DEV: case TRB_RESET_DEV:
sprintf(str, snprintf(str, size,
"%s: slot %d flags %c", "%s: slot %d flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
TRB_TO_SLOT_ID(field3), TRB_TO_SLOT_ID(field3),
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_FORCE_EVENT: case TRB_FORCE_EVENT:
sprintf(str, snprintf(str, size,
"%s: event %08x%08x vf intr %d vf id %d flags %c", "%s: event %08x%08x vf intr %d vf id %d flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field1, field0, field1, field0,
@@ -2483,14 +2488,14 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_SET_LT: case TRB_SET_LT:
sprintf(str, snprintf(str, size,
"%s: belt %d flags %c", "%s: belt %d flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
TRB_TO_BELT(field3), TRB_TO_BELT(field3),
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_GET_BW: case TRB_GET_BW:
sprintf(str, snprintf(str, size,
"%s: ctx %08x%08x slot %d speed %d flags %c", "%s: ctx %08x%08x slot %d speed %d flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field1, field0, field1, field0,
@@ -2499,7 +2504,7 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
case TRB_FORCE_HEADER: case TRB_FORCE_HEADER:
sprintf(str, snprintf(str, size,
"%s: info %08x%08x%08x pkt type %d roothub port %d flags %c", "%s: info %08x%08x%08x pkt type %d roothub port %d flags %c",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field2, field1, field0 & 0xffffffe0, field2, field1, field0 & 0xffffffe0,
@@ -2508,7 +2513,7 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
field3 & TRB_CYCLE ? 'C' : 'c'); field3 & TRB_CYCLE ? 'C' : 'c');
break; break;
default: default:
sprintf(str, snprintf(str, size,
"type '%s' -> raw %08x %08x %08x %08x", "type '%s' -> raw %08x %08x %08x %08x",
xhci_trb_type_string(type), xhci_trb_type_string(type),
field0, field1, field2, field3); field0, field1, field2, field3);
@@ -2517,10 +2522,9 @@ static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
return str; return str;
} }
static inline const char *xhci_decode_ctrl_ctx(unsigned long drop, static inline const char *xhci_decode_ctrl_ctx(char *str,
unsigned long add) unsigned long drop, unsigned long add)
{ {
static char str[1024];
unsigned int bit; unsigned int bit;
int ret = 0; int ret = 0;
@@ -2546,10 +2550,9 @@ static inline const char *xhci_decode_ctrl_ctx(unsigned long drop,
return str; return str;
} }
static inline const char *xhci_decode_slot_context(u32 info, u32 info2, static inline const char *xhci_decode_slot_context(char *str,
u32 tt_info, u32 state) u32 info, u32 info2, u32 tt_info, u32 state)
{ {
static char str[1024];
u32 speed; u32 speed;
u32 hub; u32 hub;
u32 mtt; u32 mtt;
@@ -2633,9 +2636,8 @@ static inline const char *xhci_portsc_link_state_string(u32 portsc)
return "Unknown"; return "Unknown";
} }
static inline const char *xhci_decode_portsc(u32 portsc) static inline const char *xhci_decode_portsc(char *str, u32 portsc)
{ {
static char str[256];
int ret; int ret;
ret = sprintf(str, "%s %s %s Link:%s PortSpeed:%d ", ret = sprintf(str, "%s %s %s Link:%s PortSpeed:%d ",
@@ -2679,9 +2681,8 @@ static inline const char *xhci_decode_portsc(u32 portsc)
return str; return str;
} }
static inline const char *xhci_decode_usbsts(u32 usbsts) static inline const char *xhci_decode_usbsts(char *str, u32 usbsts)
{ {
static char str[256];
int ret = 0; int ret = 0;
if (usbsts == ~(u32)0) if (usbsts == ~(u32)0)
@@ -2708,9 +2709,8 @@ static inline const char *xhci_decode_usbsts(u32 usbsts)
return str; return str;
} }
static inline const char *xhci_decode_doorbell(u32 slot, u32 doorbell) static inline const char *xhci_decode_doorbell(char *str, u32 slot, u32 doorbell)
{ {
static char str[256];
u8 ep; u8 ep;
u16 stream; u16 stream;
int ret; int ret;
@@ -2777,10 +2777,9 @@ static inline const char *xhci_ep_type_string(u8 type)
} }
} }
static inline const char *xhci_decode_ep_context(u32 info, u32 info2, u64 deq, static inline const char *xhci_decode_ep_context(char *str, u32 info,
u32 tx_info) u32 info2, u64 deq, u32 tx_info)
{ {
static char str[1024];
int ret; int ret;
u32 esit; u32 esit;

View File

@@ -227,11 +227,13 @@ void mtu3_set_speed(struct mtu3 *mtu, enum usb_device_speed speed)
mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE); mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE);
break; break;
case USB_SPEED_SUPER: case USB_SPEED_SUPER:
mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE);
mtu3_clrbits(mtu->ippc_base, SSUSB_U3_CTRL(0), mtu3_clrbits(mtu->ippc_base, SSUSB_U3_CTRL(0),
SSUSB_U3_PORT_SSP_SPEED); SSUSB_U3_PORT_SSP_SPEED);
break; break;
case USB_SPEED_SUPER_PLUS: case USB_SPEED_SUPER_PLUS:
mtu3_setbits(mtu->ippc_base, SSUSB_U3_CTRL(0), mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE);
mtu3_setbits(mtu->ippc_base, SSUSB_U3_CTRL(0),
SSUSB_U3_PORT_SSP_SPEED); SSUSB_U3_PORT_SSP_SPEED);
break; break;
default: default:

View File

@@ -64,14 +64,12 @@ static int mtu3_ep_enable(struct mtu3_ep *mep)
u32 interval = 0; u32 interval = 0;
u32 mult = 0; u32 mult = 0;
u32 burst = 0; u32 burst = 0;
int max_packet;
int ret; int ret;
desc = mep->desc; desc = mep->desc;
comp_desc = mep->comp_desc; comp_desc = mep->comp_desc;
mep->type = usb_endpoint_type(desc); mep->type = usb_endpoint_type(desc);
max_packet = usb_endpoint_maxp(desc); mep->maxp = usb_endpoint_maxp(desc);
mep->maxp = max_packet & GENMASK(10, 0);
switch (mtu->g.speed) { switch (mtu->g.speed) {
case USB_SPEED_SUPER: case USB_SPEED_SUPER:
@@ -92,7 +90,7 @@ static int mtu3_ep_enable(struct mtu3_ep *mep)
usb_endpoint_xfer_int(desc)) { usb_endpoint_xfer_int(desc)) {
interval = desc->bInterval; interval = desc->bInterval;
interval = clamp_val(interval, 1, 16) - 1; interval = clamp_val(interval, 1, 16) - 1;
burst = (max_packet & GENMASK(12, 11)) >> 11; mult = usb_endpoint_maxp_mult(desc) - 1;
} }
break; break;
default: default:

View File

@@ -226,8 +226,10 @@ static int read_mos_reg(struct usb_serial *serial, unsigned int serial_portnum,
int status; int status;
buf = kmalloc(1, GFP_KERNEL); buf = kmalloc(1, GFP_KERNEL);
if (!buf) if (!buf) {
*data = 0;
return -ENOMEM; return -ENOMEM;
}
status = usb_control_msg(usbdev, pipe, request, requesttype, value, status = usb_control_msg(usbdev, pipe, request, requesttype, value,
index, buf, 1, MOS_WDR_TIMEOUT); index, buf, 1, MOS_WDR_TIMEOUT);

View File

@@ -4615,7 +4615,7 @@ static inline void skb_reset_redirect(struct sk_buff *skb)
#endif #endif
} }
#ifdef CONFIG_KCOV #if IS_ENABLED(CONFIG_KCOV) && IS_ENABLED(CONFIG_SKB_EXTENSIONS)
static inline void skb_set_kcov_handle(struct sk_buff *skb, static inline void skb_set_kcov_handle(struct sk_buff *skb,
const u64 kcov_handle) const u64 kcov_handle)
{ {
@@ -4643,7 +4643,7 @@ static inline u64 skb_get_kcov_handle(struct sk_buff *skb)
static inline void skb_set_kcov_handle(struct sk_buff *skb, static inline void skb_set_kcov_handle(struct sk_buff *skb,
const u64 kcov_handle) { } const u64 kcov_handle) { }
static inline u64 skb_get_kcov_handle(struct sk_buff *skb) { return 0; } static inline u64 skb_get_kcov_handle(struct sk_buff *skb) { return 0; }
#endif /* CONFIG_KCOV */ #endif /* CONFIG_KCOV && CONFIG_SKB_EXTENSIONS */
#endif /* __KERNEL__ */ #endif /* __KERNEL__ */
#endif /* _LINUX_SKBUFF_H */ #endif /* _LINUX_SKBUFF_H */

View File

@@ -5,19 +5,4 @@
#include <linux/types.h> #include <linux/types.h>
#include <asm/termios.h> #include <asm/termios.h>
#define NFF 5
struct termiox
{
__u16 x_hflag;
__u16 x_cflag;
__u16 x_rflag[NFF];
__u16 x_sflag;
};
#define RTSXOFF 0x0001 /* RTS flow control on input */
#define CTSXON 0x0002 /* CTS flow control on output */
#define DTRXOFF 0x0004 /* DTR flow control on input */
#define DSRXON 0x0008 /* DCD flow control on output */
#endif #endif

View File

@@ -1870,7 +1870,7 @@ config KCOV
depends on CC_HAS_SANCOV_TRACE_PC || GCC_PLUGINS depends on CC_HAS_SANCOV_TRACE_PC || GCC_PLUGINS
select DEBUG_FS select DEBUG_FS
select GCC_PLUGIN_SANCOV if !CC_HAS_SANCOV_TRACE_PC select GCC_PLUGIN_SANCOV if !CC_HAS_SANCOV_TRACE_PC
select SKB_EXTENSIONS select SKB_EXTENSIONS if NET
help help
KCOV exposes kernel code coverage information in a form suitable KCOV exposes kernel code coverage information in a form suitable
for coverage-guided fuzzing (randomized testing). for coverage-guided fuzzing (randomized testing).

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@@ -1057,7 +1057,7 @@ static inline void __free_one_page(struct page *page,
struct page *buddy; struct page *buddy;
bool to_tail; bool to_tail;
max_order = min_t(unsigned int, MAX_ORDER, pageblock_order + 1); max_order = min_t(unsigned int, MAX_ORDER - 1, pageblock_order);
VM_BUG_ON(!zone_is_initialized(zone)); VM_BUG_ON(!zone_is_initialized(zone));
VM_BUG_ON_PAGE(page->flags & PAGE_FLAGS_CHECK_AT_PREP, page); VM_BUG_ON_PAGE(page->flags & PAGE_FLAGS_CHECK_AT_PREP, page);
@@ -1070,7 +1070,7 @@ static inline void __free_one_page(struct page *page,
VM_BUG_ON_PAGE(bad_range(zone, page), page); VM_BUG_ON_PAGE(bad_range(zone, page), page);
continue_merging: continue_merging:
while (order < max_order - 1) { while (order < max_order) {
if (compaction_capture(capc, page, order, migratetype)) { if (compaction_capture(capc, page, order, migratetype)) {
__mod_zone_freepage_state(zone, -(1 << order), __mod_zone_freepage_state(zone, -(1 << order),
migratetype); migratetype);
@@ -1096,7 +1096,7 @@ continue_merging:
pfn = combined_pfn; pfn = combined_pfn;
order++; order++;
} }
if (max_order < MAX_ORDER) { if (order < MAX_ORDER - 1) {
/* If we are here, it means order is >= pageblock_order. /* If we are here, it means order is >= pageblock_order.
* We want to prevent merge between freepages on isolate * We want to prevent merge between freepages on isolate
* pageblock and normal pageblock. Without this, pageblock * pageblock and normal pageblock. Without this, pageblock
@@ -1117,7 +1117,7 @@ continue_merging:
is_migrate_isolate(buddy_mt))) is_migrate_isolate(buddy_mt)))
goto done_merging; goto done_merging;
} }
max_order++; max_order = order + 1;
goto continue_merging; goto continue_merging;
} }

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@@ -2713,6 +2713,7 @@ int ip_check_mc_rcu(struct in_device *in_dev, __be32 mc_addr, __be32 src_addr, u
rv = 1; rv = 1;
} else if (im) { } else if (im) {
if (src_addr) { if (src_addr) {
spin_lock_bh(&im->lock);
for (psf = im->sources; psf; psf = psf->sf_next) { for (psf = im->sources; psf; psf = psf->sf_next) {
if (psf->sf_inaddr == src_addr) if (psf->sf_inaddr == src_addr)
break; break;
@@ -2723,6 +2724,7 @@ int ip_check_mc_rcu(struct in_device *in_dev, __be32 mc_addr, __be32 src_addr, u
im->sfcount[MCAST_EXCLUDE]; im->sfcount[MCAST_EXCLUDE];
else else
rv = im->sfcount[MCAST_EXCLUDE] != 0; rv = im->sfcount[MCAST_EXCLUDE] != 0;
spin_unlock_bh(&im->lock);
} else } else
rv = 1; /* unspecified source; tentatively allow */ rv = 1; /* unspecified source; tentatively allow */
} }

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@@ -4115,6 +4115,7 @@ static int nf_tables_newset(struct net *net, struct sock *nlsk,
struct nft_table *table; struct nft_table *table;
struct nft_set *set; struct nft_set *set;
struct nft_ctx ctx; struct nft_ctx ctx;
size_t alloc_size;
char *name; char *name;
u64 size; u64 size;
u64 timeout; u64 timeout;
@@ -4263,8 +4264,10 @@ static int nf_tables_newset(struct net *net, struct sock *nlsk,
size = 0; size = 0;
if (ops->privsize != NULL) if (ops->privsize != NULL)
size = ops->privsize(nla, &desc); size = ops->privsize(nla, &desc);
alloc_size = sizeof(*set) + size + udlen;
set = kvzalloc(sizeof(*set) + size + udlen, GFP_KERNEL); if (alloc_size < size)
return -ENOMEM;
set = kvzalloc(alloc_size, GFP_KERNEL);
if (!set) if (!set)
return -ENOMEM; return -ENOMEM;
@@ -4277,15 +4280,7 @@ static int nf_tables_newset(struct net *net, struct sock *nlsk,
err = nf_tables_set_alloc_name(&ctx, set, name); err = nf_tables_set_alloc_name(&ctx, set, name);
kfree(name); kfree(name);
if (err < 0) if (err < 0)
goto err_set_alloc_name; goto err_set_name;
if (nla[NFTA_SET_EXPR]) {
expr = nft_set_elem_expr_alloc(&ctx, set, nla[NFTA_SET_EXPR]);
if (IS_ERR(expr)) {
err = PTR_ERR(expr);
goto err_set_alloc_name;
}
}
udata = NULL; udata = NULL;
if (udlen) { if (udlen) {
@@ -4296,21 +4291,19 @@ static int nf_tables_newset(struct net *net, struct sock *nlsk,
INIT_LIST_HEAD(&set->bindings); INIT_LIST_HEAD(&set->bindings);
set->table = table; set->table = table;
write_pnet(&set->net, net); write_pnet(&set->net, net);
set->ops = ops; set->ops = ops;
set->ktype = ktype; set->ktype = ktype;
set->klen = desc.klen; set->klen = desc.klen;
set->dtype = dtype; set->dtype = dtype;
set->objtype = objtype; set->objtype = objtype;
set->dlen = desc.dlen; set->dlen = desc.dlen;
set->expr = expr;
set->flags = flags; set->flags = flags;
set->size = desc.size; set->size = desc.size;
set->policy = policy; set->policy = policy;
set->udlen = udlen; set->udlen = udlen;
set->udata = udata; set->udata = udata;
set->timeout = timeout; set->timeout = timeout;
set->gc_int = gc_int; set->gc_int = gc_int;
set->handle = nf_tables_alloc_handle(table);
set->field_count = desc.field_count; set->field_count = desc.field_count;
for (i = 0; i < desc.field_count; i++) for (i = 0; i < desc.field_count; i++)
@@ -4320,20 +4313,32 @@ static int nf_tables_newset(struct net *net, struct sock *nlsk,
if (err < 0) if (err < 0)
goto err_set_init; goto err_set_init;
if (nla[NFTA_SET_EXPR]) {
expr = nft_set_elem_expr_alloc(&ctx, set, nla[NFTA_SET_EXPR]);
if (IS_ERR(expr)) {
err = PTR_ERR(expr);
goto err_set_expr_alloc;
}
set->expr = expr;
}
set->handle = nf_tables_alloc_handle(table);
err = nft_trans_set_add(&ctx, NFT_MSG_NEWSET, set); err = nft_trans_set_add(&ctx, NFT_MSG_NEWSET, set);
if (err < 0) if (err < 0)
goto err_set_trans; goto err_set_expr_alloc;
list_add_tail_rcu(&set->list, &table->sets); list_add_tail_rcu(&set->list, &table->sets);
table->use++; table->use++;
return 0; return 0;
err_set_trans: err_set_expr_alloc:
if (set->expr)
nft_expr_destroy(&ctx, set->expr);
ops->destroy(set); ops->destroy(set);
err_set_init: err_set_init:
if (expr)
nft_expr_destroy(&ctx, expr);
err_set_alloc_name:
kfree(set->name); kfree(set->name);
err_set_name: err_set_name:
kvfree(set); kvfree(set);
@@ -5145,6 +5150,24 @@ static void nf_tables_set_elem_destroy(const struct nft_ctx *ctx,
kfree(elem); kfree(elem);
} }
static int nft_set_elem_expr_setup(struct nft_ctx *ctx,
const struct nft_set_ext *ext,
struct nft_expr *expr)
{
struct nft_expr *elem_expr = nft_set_ext_expr(ext);
int err;
if (expr == NULL)
return 0;
err = nft_expr_clone(elem_expr, expr);
if (err < 0)
return -ENOMEM;
nft_expr_destroy(ctx, expr);
return 0;
}
static int nft_add_set_elem(struct nft_ctx *ctx, struct nft_set *set, static int nft_add_set_elem(struct nft_ctx *ctx, struct nft_set *set,
const struct nlattr *attr, u32 nlmsg_flags) const struct nlattr *attr, u32 nlmsg_flags)
{ {
@@ -5347,15 +5370,17 @@ static int nft_add_set_elem(struct nft_ctx *ctx, struct nft_set *set,
*nft_set_ext_obj(ext) = obj; *nft_set_ext_obj(ext) = obj;
obj->use++; obj->use++;
} }
if (expr) {
memcpy(nft_set_ext_expr(ext), expr, expr->ops->size); err = nft_set_elem_expr_setup(ctx, ext, expr);
kfree(expr); if (err < 0)
expr = NULL; goto err_elem_expr;
} expr = NULL;
trans = nft_trans_elem_alloc(ctx, NFT_MSG_NEWSETELEM, set); trans = nft_trans_elem_alloc(ctx, NFT_MSG_NEWSETELEM, set);
if (trans == NULL) if (trans == NULL) {
goto err_trans; err = -ENOMEM;
goto err_elem_expr;
}
ext->genmask = nft_genmask_cur(ctx->net) | NFT_SET_ELEM_BUSY_MASK; ext->genmask = nft_genmask_cur(ctx->net) | NFT_SET_ELEM_BUSY_MASK;
err = set->ops->insert(ctx->net, set, &elem, &ext2); err = set->ops->insert(ctx->net, set, &elem, &ext2);
@@ -5399,7 +5424,7 @@ err_set_full:
set->ops->remove(ctx->net, set, &elem); set->ops->remove(ctx->net, set, &elem);
err_element_clash: err_element_clash:
kfree(trans); kfree(trans);
err_trans: err_elem_expr:
if (obj) if (obj)
obj->use--; obj->use--;

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@@ -604,7 +604,7 @@ static u64 nft_hash_privsize(const struct nlattr * const nla[],
const struct nft_set_desc *desc) const struct nft_set_desc *desc)
{ {
return sizeof(struct nft_hash) + return sizeof(struct nft_hash) +
nft_hash_buckets(desc->size) * sizeof(struct hlist_head); (u64)nft_hash_buckets(desc->size) * sizeof(struct hlist_head);
} }
static int nft_hash_init(const struct nft_set *set, static int nft_hash_init(const struct nft_set *set,
@@ -644,8 +644,8 @@ static bool nft_hash_estimate(const struct nft_set_desc *desc, u32 features,
return false; return false;
est->size = sizeof(struct nft_hash) + est->size = sizeof(struct nft_hash) +
nft_hash_buckets(desc->size) * sizeof(struct hlist_head) + (u64)nft_hash_buckets(desc->size) * sizeof(struct hlist_head) +
desc->size * sizeof(struct nft_hash_elem); (u64)desc->size * sizeof(struct nft_hash_elem);
est->lookup = NFT_SET_CLASS_O_1; est->lookup = NFT_SET_CLASS_O_1;
est->space = NFT_SET_CLASS_O_N; est->space = NFT_SET_CLASS_O_N;
@@ -662,8 +662,8 @@ static bool nft_hash_fast_estimate(const struct nft_set_desc *desc, u32 features
return false; return false;
est->size = sizeof(struct nft_hash) + est->size = sizeof(struct nft_hash) +
nft_hash_buckets(desc->size) * sizeof(struct hlist_head) + (u64)nft_hash_buckets(desc->size) * sizeof(struct hlist_head) +
desc->size * sizeof(struct nft_hash_elem); (u64)desc->size * sizeof(struct nft_hash_elem);
est->lookup = NFT_SET_CLASS_O_1; est->lookup = NFT_SET_CLASS_O_1;
est->space = NFT_SET_CLASS_O_N; est->space = NFT_SET_CLASS_O_N;

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@@ -1896,6 +1896,7 @@ static const struct registration_quirk registration_quirks[] = {
REG_QUIRK_ENTRY(0x0951, 0x16ed, 2), /* Kingston HyperX Cloud Alpha S */ REG_QUIRK_ENTRY(0x0951, 0x16ed, 2), /* Kingston HyperX Cloud Alpha S */
REG_QUIRK_ENTRY(0x0951, 0x16ea, 2), /* Kingston HyperX Cloud Flight S */ REG_QUIRK_ENTRY(0x0951, 0x16ea, 2), /* Kingston HyperX Cloud Flight S */
REG_QUIRK_ENTRY(0x0ecb, 0x1f46, 2), /* JBL Quantum 600 */ REG_QUIRK_ENTRY(0x0ecb, 0x1f46, 2), /* JBL Quantum 600 */
REG_QUIRK_ENTRY(0x0ecb, 0x1f47, 2), /* JBL Quantum 800 */
REG_QUIRK_ENTRY(0x0ecb, 0x2039, 2), /* JBL Quantum 400 */ REG_QUIRK_ENTRY(0x0ecb, 0x2039, 2), /* JBL Quantum 400 */
REG_QUIRK_ENTRY(0x0ecb, 0x203c, 2), /* JBL Quantum 600 */ REG_QUIRK_ENTRY(0x0ecb, 0x203c, 2), /* JBL Quantum 600 */
REG_QUIRK_ENTRY(0x0ecb, 0x203e, 2), /* JBL Quantum 800 */ REG_QUIRK_ENTRY(0x0ecb, 0x203e, 2), /* JBL Quantum 800 */