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[BNX2]: Use CPU native page size

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Use CPU native page size to determine various ring sizes. This allows
order-0 memory allocations on all systems.

Added check to limit the page size to 16K since that's the maximum rx
ring size that will be used. This will prevent using unnecessarily
large page sizes on some architectures with large page sizes.
[Suggested by David Miller]

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Chan
2006-06-13 15:03:47 -07:00
committed by David S. Miller
parent 7a6400cd3d
commit c86a31f452
2 changed files with 8 additions and 2 deletions
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drivers/net/bnx2.c
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@@ -32,6 +32,7 @@
#include <asm/irq.h>
#include <linux/delay.h>
#include <asm/byteorder.h>
#include <asm/page.h>
#include <linux/time.h>
#include <linux/ethtool.h>
#include <linux/mii.h>