xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

powerpc: Fix usage of register macros getting ready for %r0 change

Browse Source 
Anything that uses a constructed instruction (ie. from ppc-opcode.h),
need to use the new R0 macro, as %r0 is not going to work.

Also convert usages of macros where we are just determining an offset
(usually for a load/store), like:
	std	r14,STK_REG(r14)(r1)
Can't use STK_REG(r14) as %r14 doesn't work in the STK_REG macro since
it's just calculating an offset.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Michael Neuling
2012-06-25 13:33:10 +00:00
committed by Benjamin Herrenschmidt
parent 564aa5cfd3
commit c75df6f96c
25 changed files with 657 additions and 657 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
arch/powerpc/lib/ldstfp.S
View File

@@ -330,13 +330,13 @@ _GLOBAL(do_lxvd2x)
MTMSRD(r7)
isync
beq cr7,1f
STXVD2X(0,r1,r8)
STXVD2X(0,R1,R8)
1: li r9,-EFAULT
2: LXVD2X(0,0,r4)
2: LXVD2X(0,0,R4)
li r9,0
3: beq cr7,4f
bl put_vsr
LXVD2X(0,r1,r8)
LXVD2X(0,R1,R8)
4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
mtlr r0
MTMSRD(r6)
@@ -358,13 +358,13 @@ _GLOBAL(do_stxvd2x)
MTMSRD(r7)
isync
beq cr7,1f
STXVD2X(0,r1,r8)
STXVD2X(0,R1,R8)
bl get_vsr
1: li r9,-EFAULT
2: STXVD2X(0,0,r4)
2: STXVD2X(0,0,R4)
li r9,0
3: beq cr7,4f
LXVD2X(0,r1,r8)
LXVD2X(0,R1,R8)
4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
mtlr r0
MTMSRD(r6)