iwlwifi: pcie: remove unnecessary iwl_pcie_enable_rx_wake() function
This function was only used by 9000 A-step devices, which we don't support anymore, so it can be removed. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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@@ -1029,8 +1029,6 @@ static inline int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans)
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int iwl_pci_fw_exit_d0i3(struct iwl_trans *trans);
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int iwl_pci_fw_enter_d0i3(struct iwl_trans *trans);
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void iwl_pcie_enable_rx_wake(struct iwl_trans *trans, bool enable);
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void iwl_pcie_rx_allocator_work(struct work_struct *data);
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/* common functions that are used by gen2 transport */
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@@ -868,30 +868,6 @@ static void iwl_pcie_rx_hw_init(struct iwl_trans *trans, struct iwl_rxq *rxq)
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iwl_set_bit(trans, CSR_INT_COALESCING, IWL_HOST_INT_OPER_MODE);
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}
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void iwl_pcie_enable_rx_wake(struct iwl_trans *trans, bool enable)
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{
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if (trans->cfg->device_family != IWL_DEVICE_FAMILY_9000)
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return;
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if (CSR_HW_REV_STEP(trans->hw_rev) != SILICON_A_STEP)
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return;
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if (!trans->cfg->integrated)
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return;
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/*
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* Turn on the chicken-bits that cause MAC wakeup for RX-related
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* values.
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* This costs some power, but needed for W/A 9000 integrated A-step
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* bug where shadow registers are not in the retention list and their
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* value is lost when NIC powers down
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*/
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iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL,
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CSR_MAC_SHADOW_REG_CTRL_RX_WAKE);
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iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTL2,
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CSR_MAC_SHADOW_REG_CTL2_RX_WAKE);
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}
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static void iwl_pcie_rx_mq_hw_init(struct iwl_trans *trans)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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@@ -979,8 +955,6 @@ static void iwl_pcie_rx_mq_hw_init(struct iwl_trans *trans)
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/* Set interrupt coalescing timer to default (2048 usecs) */
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iwl_write8(trans, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
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iwl_pcie_enable_rx_wake(trans, true);
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}
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void iwl_pcie_rx_init_rxb_lists(struct iwl_rxq *rxq)
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@@ -1530,8 +1530,6 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test,
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iwl_clear_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_init_done));
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iwl_pcie_enable_rx_wake(trans, false);
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if (reset) {
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/*
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* reset TX queues -- some of their registers reset during S3
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@@ -1558,8 +1556,6 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
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return 0;
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}
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iwl_pcie_enable_rx_wake(trans, true);
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iwl_set_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_mac_access_req));
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iwl_set_bit(trans, CSR_GP_CNTRL,
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