drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC
When this flag is set, we program the hardware to execute the flip during horizontal blank (i.e. for the next scanline) instead of during vertical blank (i.e. for the next frame). Currently this is only supported on ASICs which have a page flip completion interrupt (>= R600), and only if the use_pflipirq parameter has value 2 (the default). Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher

parent
a4333b4c99
commit
c63dd75858
@@ -801,7 +801,7 @@ u32 rv770_get_xclk(struct radeon_device *rdev)
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return reference_clock;
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}
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void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
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void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async)
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{
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struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
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u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset);
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@@ -812,6 +812,8 @@ void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
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WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp);
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/* update the scanout addresses */
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WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset,
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async ? AVIVO_D1GRPH_SURFACE_UPDATE_H_RETRACE_EN : 0);
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if (radeon_crtc->crtc_id) {
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WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
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WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));
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