Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Will Deacon: "Mostly just incremental improvements here: - Introduce AT_HWCAP2 for advertising CPU features to userspace - Expose SVE2 availability to userspace - Support for "data cache clean to point of deep persistence" (DC PODP) - Honour "mitigations=off" on the cmdline and advertise status via sysfs - CPU timer erratum workaround (Neoverse-N1 #1188873) - Introduce perf PMU driver for the SMMUv3 performance counters - Add config option to disable the kuser helpers page for AArch32 tasks - Futex modifications to ensure liveness under contention - Rework debug exception handling to seperate kernel and user handlers - Non-critical fixes and cleanup" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (92 commits) Documentation: Add ARM64 to kernel-parameters.rst arm64/speculation: Support 'mitigations=' cmdline option arm64: ssbs: Don't treat CPUs with SSBS as unaffected by SSB arm64: enable generic CPU vulnerabilites support arm64: add sysfs vulnerability show for speculative store bypass arm64: Fix size of __early_cpu_boot_status clocksource/arm_arch_timer: Use arch_timer_read_counter to access stable counters clocksource/arm_arch_timer: Remove use of workaround static key clocksource/arm_arch_timer: Drop use of static key in arch_timer_reg_read_stable clocksource/arm_arch_timer: Direcly assign set_next_event workaround arm64: Use arch_timer_read_counter instead of arch_counter_get_cntvct watchdog/sbsa: Use arch_timer_read_counter instead of arch_counter_get_cntvct ARM: vdso: Remove dependency with the arch_timer driver internals arm64: Apply ARM64_ERRATUM_1188873 to Neoverse-N1 arm64: Add part number for Neoverse N1 arm64: Make ARM64_ERRATUM_1188873 depend on COMPAT arm64: Restrict ARM64_ERRATUM_1188873 mitigation to AArch32 arm64: mm: Remove pte_unmap_nested() arm64: Fix compiler warning from pte_unmap() with -Wunused-but-set-variable arm64: compat: Reduce address limit for 64K pages ...
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@@ -149,6 +149,26 @@ u32 arch_timer_reg_read(int access, enum arch_timer_reg reg,
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return val;
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}
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static u64 arch_counter_get_cntpct_stable(void)
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{
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return __arch_counter_get_cntpct_stable();
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}
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static u64 arch_counter_get_cntpct(void)
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{
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return __arch_counter_get_cntpct();
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}
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static u64 arch_counter_get_cntvct_stable(void)
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{
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return __arch_counter_get_cntvct_stable();
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}
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static u64 arch_counter_get_cntvct(void)
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{
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return __arch_counter_get_cntvct();
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}
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/*
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* Default to cp15 based access because arm64 uses this function for
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* sched_clock() before DT is probed and the cp15 method is guaranteed
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@@ -316,13 +336,6 @@ static u64 notrace arm64_858921_read_cntvct_el0(void)
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}
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_1188873
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static u64 notrace arm64_1188873_read_cntvct_el0(void)
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{
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return read_sysreg(cntvct_el0);
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}
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#endif
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#ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1
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/*
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* The low bits of the counter registers are indeterminate while bit 10 or
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@@ -369,8 +382,7 @@ static u32 notrace sun50i_a64_read_cntv_tval_el0(void)
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DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, timer_unstable_counter_workaround);
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EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround);
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DEFINE_STATIC_KEY_FALSE(arch_timer_read_ool_enabled);
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EXPORT_SYMBOL_GPL(arch_timer_read_ool_enabled);
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static atomic_t timer_unstable_counter_workaround_in_use = ATOMIC_INIT(0);
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static void erratum_set_next_event_tval_generic(const int access, unsigned long evt,
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struct clock_event_device *clk)
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@@ -454,14 +466,6 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
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.read_cntvct_el0 = arm64_858921_read_cntvct_el0,
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_1188873
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{
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.match_type = ate_match_local_cap_id,
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.id = (void *)ARM64_WORKAROUND_1188873,
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.desc = "ARM erratum 1188873",
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.read_cntvct_el0 = arm64_1188873_read_cntvct_el0,
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},
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#endif
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#ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1
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{
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.match_type = ate_match_dt,
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@@ -549,11 +553,8 @@ void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa
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per_cpu(timer_unstable_counter_workaround, i) = wa;
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}
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/*
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* Use the locked version, as we're called from the CPU
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* hotplug framework. Otherwise, we end-up in deadlock-land.
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*/
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static_branch_enable_cpuslocked(&arch_timer_read_ool_enabled);
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if (wa->read_cntvct_el0 || wa->read_cntpct_el0)
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atomic_set(&timer_unstable_counter_workaround_in_use, 1);
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/*
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* Don't use the vdso fastpath if errata require using the
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@@ -570,7 +571,7 @@ void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa
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static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type type,
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void *arg)
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{
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const struct arch_timer_erratum_workaround *wa;
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const struct arch_timer_erratum_workaround *wa, *__wa;
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ate_match_fn_t match_fn = NULL;
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bool local = false;
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@@ -594,53 +595,32 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t
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if (!wa)
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return;
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if (needs_unstable_timer_counter_workaround()) {
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const struct arch_timer_erratum_workaround *__wa;
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__wa = __this_cpu_read(timer_unstable_counter_workaround);
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if (__wa && wa != __wa)
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pr_warn("Can't enable workaround for %s (clashes with %s\n)",
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wa->desc, __wa->desc);
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__wa = __this_cpu_read(timer_unstable_counter_workaround);
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if (__wa && wa != __wa)
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pr_warn("Can't enable workaround for %s (clashes with %s\n)",
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wa->desc, __wa->desc);
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if (__wa)
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return;
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}
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if (__wa)
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return;
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arch_timer_enable_workaround(wa, local);
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pr_info("Enabling %s workaround for %s\n",
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local ? "local" : "global", wa->desc);
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}
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#define erratum_handler(fn, r, ...) \
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({ \
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bool __val; \
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if (needs_unstable_timer_counter_workaround()) { \
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const struct arch_timer_erratum_workaround *__wa; \
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__wa = __this_cpu_read(timer_unstable_counter_workaround); \
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if (__wa && __wa->fn) { \
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r = __wa->fn(__VA_ARGS__); \
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__val = true; \
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} else { \
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__val = false; \
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} \
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} else { \
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__val = false; \
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} \
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__val; \
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})
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static bool arch_timer_this_cpu_has_cntvct_wa(void)
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{
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const struct arch_timer_erratum_workaround *wa;
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return has_erratum_handler(read_cntvct_el0);
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}
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wa = __this_cpu_read(timer_unstable_counter_workaround);
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return wa && wa->read_cntvct_el0;
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static bool arch_timer_counter_has_wa(void)
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{
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return atomic_read(&timer_unstable_counter_workaround_in_use);
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}
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#else
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#define arch_timer_check_ool_workaround(t,a) do { } while(0)
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#define erratum_set_next_event_tval_virt(...) ({BUG(); 0;})
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#define erratum_set_next_event_tval_phys(...) ({BUG(); 0;})
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#define erratum_handler(fn, r, ...) ({false;})
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#define arch_timer_this_cpu_has_cntvct_wa() ({false;})
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#define arch_timer_counter_has_wa() ({false;})
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#endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */
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static __always_inline irqreturn_t timer_handler(const int access,
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@@ -733,11 +713,6 @@ static __always_inline void set_next_event(const int access, unsigned long evt,
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static int arch_timer_set_next_event_virt(unsigned long evt,
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struct clock_event_device *clk)
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{
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int ret;
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if (erratum_handler(set_next_event_virt, ret, evt, clk))
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return ret;
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set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
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return 0;
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}
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@@ -745,11 +720,6 @@ static int arch_timer_set_next_event_virt(unsigned long evt,
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static int arch_timer_set_next_event_phys(unsigned long evt,
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struct clock_event_device *clk)
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{
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int ret;
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if (erratum_handler(set_next_event_phys, ret, evt, clk))
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return ret;
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set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);
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return 0;
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}
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@@ -774,6 +744,10 @@ static void __arch_timer_setup(unsigned type,
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clk->features = CLOCK_EVT_FEAT_ONESHOT;
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if (type == ARCH_TIMER_TYPE_CP15) {
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typeof(clk->set_next_event) sne;
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arch_timer_check_ool_workaround(ate_match_local_cap_id, NULL);
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if (arch_timer_c3stop)
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clk->features |= CLOCK_EVT_FEAT_C3STOP;
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clk->name = "arch_sys_timer";
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@@ -784,20 +758,20 @@ static void __arch_timer_setup(unsigned type,
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case ARCH_TIMER_VIRT_PPI:
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clk->set_state_shutdown = arch_timer_shutdown_virt;
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clk->set_state_oneshot_stopped = arch_timer_shutdown_virt;
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clk->set_next_event = arch_timer_set_next_event_virt;
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sne = erratum_handler(set_next_event_virt);
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break;
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case ARCH_TIMER_PHYS_SECURE_PPI:
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case ARCH_TIMER_PHYS_NONSECURE_PPI:
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case ARCH_TIMER_HYP_PPI:
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clk->set_state_shutdown = arch_timer_shutdown_phys;
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clk->set_state_oneshot_stopped = arch_timer_shutdown_phys;
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clk->set_next_event = arch_timer_set_next_event_phys;
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sne = erratum_handler(set_next_event_phys);
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break;
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default:
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BUG();
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}
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arch_timer_check_ool_workaround(ate_match_local_cap_id, NULL);
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clk->set_next_event = sne;
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} else {
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clk->features |= CLOCK_EVT_FEAT_DYNIRQ;
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clk->name = "arch_mem_timer";
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@@ -830,7 +804,11 @@ static void arch_timer_evtstrm_enable(int divider)
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cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)
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| ARCH_TIMER_VIRT_EVT_EN;
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arch_timer_set_cntkctl(cntkctl);
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#ifdef CONFIG_ARM64
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cpu_set_named_feature(EVTSTRM);
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#else
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elf_hwcap |= HWCAP_EVTSTRM;
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#endif
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#ifdef CONFIG_COMPAT
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compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
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#endif
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@@ -995,12 +973,22 @@ static void __init arch_counter_register(unsigned type)
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/* Register the CP15 based counter if we have one */
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if (type & ARCH_TIMER_TYPE_CP15) {
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if ((IS_ENABLED(CONFIG_ARM64) && !is_hyp_mode_available()) ||
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arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI)
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arch_timer_read_counter = arch_counter_get_cntvct;
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else
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arch_timer_read_counter = arch_counter_get_cntpct;
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u64 (*rd)(void);
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if ((IS_ENABLED(CONFIG_ARM64) && !is_hyp_mode_available()) ||
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arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) {
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if (arch_timer_counter_has_wa())
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rd = arch_counter_get_cntvct_stable;
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else
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rd = arch_counter_get_cntvct;
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} else {
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if (arch_timer_counter_has_wa())
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rd = arch_counter_get_cntpct_stable;
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else
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rd = arch_counter_get_cntpct;
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}
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arch_timer_read_counter = rd;
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clocksource_counter.archdata.vdso_direct = vdso_default;
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} else {
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arch_timer_read_counter = arch_counter_get_cntvct_mem;
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@@ -1052,7 +1040,11 @@ static int arch_timer_cpu_pm_notify(struct notifier_block *self,
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} else if (action == CPU_PM_ENTER_FAILED || action == CPU_PM_EXIT) {
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arch_timer_set_cntkctl(__this_cpu_read(saved_cntkctl));
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#ifdef CONFIG_ARM64
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if (cpu_have_named_feature(EVTSTRM))
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#else
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if (elf_hwcap & HWCAP_EVTSTRM)
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#endif
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cpumask_set_cpu(smp_processor_id(), &evtstrm_available);
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}
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return NOTIFY_OK;
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