Merge tag 'qcom-drivers-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm ARM Based Driver Updates for v5.3 * Add ACPI support to Qualcomm GENI SE * Update Qualcomm Maintainers entry to remove David Brown as maintainer and fixup typos and incorrect DT file entry * Fixup APR domain id usage and making callbacks in non-atomic context * Add AOSS QMP driver and bindings * Add power domains for MSM8998 and QCS404 in QCOM RPMPD * Add corner macros, max state support, and fixups for setting performance state for Qcom RPMPD * tag 'qcom-drivers-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: geni: Add support for ACPI MAINTAINERS: Remove myself as qcom maintainer soc: qcom: apr: Don't use reg for domain id soc: qcom: fix QCOM_AOSS_QMP dependency and build errors soc: qcom: Add AOSS QMP driver dt-bindings: soc: qcom: Add AOSS QMP binding qcom: apr: Make apr callbacks in non-atomic context soc: qcom: rpmpd: Add MSM8998 power-domains dt-bindings: power: Add rpm power domain bindings for msm8998 soc: qcom: rpmpd: Add QCS404 power-domains dt-bindings: power: Add rpm power domain bindings for qcs404 soc: qcom: rpmpd: Modify corner defining macros soc: qcom: rpmpd: Add support to set rpmpd state to max soc: qcom: rpmpd: fixup rpmpd set performance state MAINTAINER: Fix Qualcomm ETHQOS ethernet DT file MAINTAINERS: fix typo in file name Signed-off-by: Olof Johansson <olof@lixom.net>
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@@ -6,6 +6,8 @@ which then translates it into a corresponding voltage on a rail
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Required Properties:
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- compatible: Should be one of the following
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* qcom,msm8996-rpmpd: RPM Power domain for the msm8996 family of SoC
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* qcom,msm8998-rpmpd: RPM Power domain for the msm8998 family of SoC
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* qcom,qcs404-rpmpd: RPM Power domain for the qcs404 family of SoC
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* qcom,sdm845-rpmhpd: RPMh Power domain for the sdm845 family of SoC
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- #power-domain-cells: number of cells in Power domain specifier
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must be 1.
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81
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
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81
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
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@@ -0,0 +1,81 @@
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Qualcomm Always-On Subsystem side channel binding
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This binding describes the hardware component responsible for side channel
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requests to the always-on subsystem (AOSS), used for certain power management
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requests that is not handled by the standard RPMh interface. Each client in the
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SoC has it's own block of message RAM and IRQ for communication with the AOSS.
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The protocol used to communicate in the message RAM is known as Qualcomm
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Messaging Protocol (QMP)
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The AOSS side channel exposes control over a set of resources, used to control
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a set of debug related clocks and to affect the low power state of resources
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related to the secondary subsystems. These resources are exposed as a set of
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power-domains.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be "qcom,sdm845-aoss-qmp"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: the base address and size of the message RAM for this
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client's communication with the AOSS
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the AOSS message IRQ for this client
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- mboxes:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: reference to the mailbox representing the outgoing doorbell
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in APCS for this client, as described in mailbox/mailbox.txt
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- #clock-cells:
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Usage: optional
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Value type: <u32>
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Definition: must be 0
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The single clock represents the QDSS clock.
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- #power-domain-cells:
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Usage: optional
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Value type: <u32>
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Definition: must be 1
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The provided power-domains are:
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CDSP state (0), LPASS state (1), modem state (2), SLPI
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state (3), SPSS state (4) and Venus state (5).
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= SUBNODES
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The AOSS side channel also provides the controls for three cooling devices,
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these are expressed as subnodes of the QMP node. The name of the node is used
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to identify the resource and must therefor be "cx", "mx" or "ebi".
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- #cooling-cells:
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Usage: optional
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Value type: <u32>
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Definition: must be 2
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= EXAMPLE
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The following example represents the AOSS side-channel message RAM and the
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mechanism exposing the power-domains, as found in SDM845.
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aoss_qmp: qmp@c300000 {
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compatible = "qcom,sdm845-aoss-qmp";
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reg = <0x0c300000 0x100000>;
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interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 0>;
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#power-domain-cells = <1>;
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cx_cdev: cx {
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#cooling-cells = <2>;
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};
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mx_cdev: mx {
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#cooling-cells = <2>;
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};
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};
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@@ -9,7 +9,7 @@ used for audio/voice services on the QDSP.
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Value type: <stringlist>
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Definition: must be "qcom,apr-v<VERSION-NUMBER>", example "qcom,apr-v2"
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- reg
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- qcom,apr-domain
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Usage: required
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Value type: <u32>
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Definition: Destination processor ID.
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@@ -49,9 +49,9 @@ by the individual bindings for the specific service
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The following example represents a QDSP based sound card on a MSM8996 device
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which uses apr as communication between Apps and QDSP.
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apr@4 {
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apr {
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compatible = "qcom,apr-v2";
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reg = <APR_DOMAIN_ADSP>;
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qcom,apr-domain = <APR_DOMAIN_ADSP>;
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q6core@3 {
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compatible = "qcom,q6core";
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