Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
Merge mainline to pick up c7513c2a27
("crypto/arm64: aes-ce-gcm -
add missing kernel_neon_begin/end pair").
This commit is contained in:
@@ -157,7 +157,6 @@ config BGMAC
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config BGMAC_BCMA
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tristate "Broadcom iProc GBit BCMA support"
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depends on BCMA && BCMA_HOST_SOC
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depends on HAS_DMA
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depends on BCM47XX || ARCH_BCM_5301X || COMPILE_TEST
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select BGMAC
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select PHYLIB
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@@ -170,7 +169,6 @@ config BGMAC_BCMA
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config BGMAC_PLATFORM
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tristate "Broadcom iProc GBit platform support"
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depends on HAS_DMA
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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depends on OF
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select BGMAC
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@@ -1946,8 +1946,8 @@ static int bcm_sysport_open(struct net_device *dev)
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if (!priv->is_lite)
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priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
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else
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priv->crc_fwd = !!(gib_readl(priv, GIB_CONTROL) &
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GIB_FCS_STRIP);
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priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) &
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GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT);
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phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
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0, priv->phy_interface);
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@@ -278,7 +278,8 @@ struct bcm_rsb {
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#define GIB_GTX_CLK_EXT_CLK (0 << GIB_GTX_CLK_SEL_SHIFT)
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#define GIB_GTX_CLK_125MHZ (1 << GIB_GTX_CLK_SEL_SHIFT)
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#define GIB_GTX_CLK_250MHZ (2 << GIB_GTX_CLK_SEL_SHIFT)
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#define GIB_FCS_STRIP (1 << 6)
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#define GIB_FCS_STRIP_SHIFT 6
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#define GIB_FCS_STRIP (1 << GIB_FCS_STRIP_SHIFT)
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#define GIB_LCL_LOOP_EN (1 << 7)
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#define GIB_LCL_LOOP_TXEN (1 << 8)
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#define GIB_RMT_LOOP_EN (1 << 9)
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@@ -1533,6 +1533,7 @@ struct bnx2x {
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struct link_vars link_vars;
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u32 link_cnt;
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struct bnx2x_link_report_data last_reported_link;
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bool force_link_down;
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struct mdio_if_info mdio;
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@@ -1261,6 +1261,11 @@ void __bnx2x_link_report(struct bnx2x *bp)
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{
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struct bnx2x_link_report_data cur_data;
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if (bp->force_link_down) {
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bp->link_vars.link_up = 0;
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return;
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}
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/* reread mf_cfg */
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if (IS_PF(bp) && !CHIP_IS_E1(bp))
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bnx2x_read_mf_cfg(bp);
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@@ -2817,6 +2822,7 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
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bp->pending_max = 0;
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}
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bp->force_link_down = false;
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if (bp->port.pmf) {
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rc = bnx2x_initial_phy_init(bp, load_mode);
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if (rc)
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@@ -3388,14 +3388,18 @@ static int bnx2x_set_rss_flags(struct bnx2x *bp, struct ethtool_rxnfc *info)
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DP(BNX2X_MSG_ETHTOOL,
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"rss re-configured, UDP 4-tupple %s\n",
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udp_rss_requested ? "enabled" : "disabled");
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return bnx2x_rss(bp, &bp->rss_conf_obj, false, true);
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if (bp->state == BNX2X_STATE_OPEN)
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return bnx2x_rss(bp, &bp->rss_conf_obj, false,
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true);
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} else if ((info->flow_type == UDP_V6_FLOW) &&
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(bp->rss_conf_obj.udp_rss_v6 != udp_rss_requested)) {
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bp->rss_conf_obj.udp_rss_v6 = udp_rss_requested;
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DP(BNX2X_MSG_ETHTOOL,
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"rss re-configured, UDP 4-tupple %s\n",
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udp_rss_requested ? "enabled" : "disabled");
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return bnx2x_rss(bp, &bp->rss_conf_obj, false, true);
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if (bp->state == BNX2X_STATE_OPEN)
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return bnx2x_rss(bp, &bp->rss_conf_obj, false,
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true);
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}
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return 0;
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@@ -3509,7 +3513,10 @@ static int bnx2x_set_rxfh(struct net_device *dev, const u32 *indir,
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bp->rss_conf_obj.ind_table[i] = indir[i] + bp->fp->cl_id;
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}
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return bnx2x_config_rss_eth(bp, false);
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if (bp->state == BNX2X_STATE_OPEN)
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return bnx2x_config_rss_eth(bp, false);
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return 0;
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}
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/**
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@@ -10279,6 +10279,12 @@ static void bnx2x_sp_rtnl_task(struct work_struct *work)
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bp->sp_rtnl_state = 0;
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smp_mb();
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/* Immediately indicate link as down */
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bp->link_vars.link_up = 0;
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bp->force_link_down = true;
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netif_carrier_off(bp->dev);
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BNX2X_ERR("Indicating link is down due to Tx-timeout\n");
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bnx2x_nic_unload(bp, UNLOAD_NORMAL, true);
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/* When ret value shows failure of allocation failure,
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* the nic is rebooted again. If open still fails, a error
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@@ -5712,7 +5712,9 @@ static int bnxt_init_chip(struct bnxt *bp, bool irq_re_init)
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}
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vnic->uc_filter_count = 1;
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vnic->rx_mask = CFA_L2_SET_RX_MASK_REQ_MASK_BCAST;
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vnic->rx_mask = 0;
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if (bp->dev->flags & IFF_BROADCAST)
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vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_BCAST;
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if ((bp->dev->flags & IFF_PROMISC) && bnxt_promisc_ok(bp))
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vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS;
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@@ -5917,7 +5919,7 @@ unsigned int bnxt_get_max_func_irqs(struct bnxt *bp)
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return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_cp_rings);
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}
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void bnxt_set_max_func_irqs(struct bnxt *bp, unsigned int max_irqs)
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static void bnxt_set_max_func_irqs(struct bnxt *bp, unsigned int max_irqs)
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{
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bp->hw_resc.max_irqs = max_irqs;
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}
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@@ -6888,7 +6890,7 @@ static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)
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rc = bnxt_request_irq(bp);
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if (rc) {
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netdev_err(bp->dev, "bnxt_request_irq err: %x\n", rc);
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goto open_err;
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goto open_err_irq;
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}
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}
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@@ -6928,6 +6930,8 @@ static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)
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open_err:
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bnxt_debug_dev_exit(bp);
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bnxt_disable_napi(bp);
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open_err_irq:
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bnxt_del_napi(bp);
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open_err_free_mem:
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@@ -7214,13 +7218,16 @@ static void bnxt_set_rx_mode(struct net_device *dev)
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mask &= ~(CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS |
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CFA_L2_SET_RX_MASK_REQ_MASK_MCAST |
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CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST);
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CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST |
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CFA_L2_SET_RX_MASK_REQ_MASK_BCAST);
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if ((dev->flags & IFF_PROMISC) && bnxt_promisc_ok(bp))
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mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS;
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uc_update = bnxt_uc_list_updated(bp);
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if (dev->flags & IFF_BROADCAST)
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mask |= CFA_L2_SET_RX_MASK_REQ_MASK_BCAST;
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if (dev->flags & IFF_ALLMULTI) {
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mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST;
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vnic->mc_list_count = 0;
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@@ -8502,11 +8509,11 @@ int bnxt_get_max_rings(struct bnxt *bp, int *max_rx, int *max_tx, bool shared)
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int rx, tx, cp;
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_bnxt_get_max_rings(bp, &rx, &tx, &cp);
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*max_rx = rx;
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*max_tx = tx;
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if (!rx || !tx || !cp)
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return -ENOMEM;
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*max_rx = rx;
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*max_tx = tx;
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return bnxt_trim_rings(bp, max_rx, max_tx, cp, shared);
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}
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@@ -8520,8 +8527,11 @@ static int bnxt_get_dflt_rings(struct bnxt *bp, int *max_rx, int *max_tx,
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/* Not enough rings, try disabling agg rings. */
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bp->flags &= ~BNXT_FLAG_AGG_RINGS;
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rc = bnxt_get_max_rings(bp, max_rx, max_tx, shared);
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if (rc)
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if (rc) {
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/* set BNXT_FLAG_AGG_RINGS back for consistency */
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bp->flags |= BNXT_FLAG_AGG_RINGS;
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return rc;
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}
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bp->flags |= BNXT_FLAG_NO_AGG_RINGS;
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bp->dev->hw_features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW);
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bp->dev->features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW);
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@@ -1470,7 +1470,6 @@ void bnxt_set_max_func_stat_ctxs(struct bnxt *bp, unsigned int max);
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unsigned int bnxt_get_max_func_cp_rings(struct bnxt *bp);
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void bnxt_set_max_func_cp_rings(struct bnxt *bp, unsigned int max);
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unsigned int bnxt_get_max_func_irqs(struct bnxt *bp);
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void bnxt_set_max_func_irqs(struct bnxt *bp, unsigned int max);
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int bnxt_get_avail_msix(struct bnxt *bp, int num);
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int bnxt_reserve_rings(struct bnxt *bp);
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void bnxt_tx_disable(struct bnxt *bp);
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@@ -27,6 +27,15 @@
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#define BNXT_FID_INVALID 0xffff
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#define VLAN_TCI(vid, prio) ((vid) | ((prio) << VLAN_PRIO_SHIFT))
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#define is_vlan_pcp_wildcarded(vlan_tci_mask) \
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((ntohs(vlan_tci_mask) & VLAN_PRIO_MASK) == 0x0000)
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#define is_vlan_pcp_exactmatch(vlan_tci_mask) \
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((ntohs(vlan_tci_mask) & VLAN_PRIO_MASK) == VLAN_PRIO_MASK)
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#define is_vlan_pcp_zero(vlan_tci) \
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((ntohs(vlan_tci) & VLAN_PRIO_MASK) == 0x0000)
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#define is_vid_exactmatch(vlan_tci_mask) \
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((ntohs(vlan_tci_mask) & VLAN_VID_MASK) == VLAN_VID_MASK)
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/* Return the dst fid of the func for flow forwarding
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* For PFs: src_fid is the fid of the PF
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* For VF-reps: src_fid the fid of the VF
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@@ -389,6 +398,21 @@ static bool is_exactmatch(void *mask, int len)
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return true;
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}
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static bool is_vlan_tci_allowed(__be16 vlan_tci_mask,
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__be16 vlan_tci)
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{
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/* VLAN priority must be either exactly zero or fully wildcarded and
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* VLAN id must be exact match.
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*/
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if (is_vid_exactmatch(vlan_tci_mask) &&
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((is_vlan_pcp_exactmatch(vlan_tci_mask) &&
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is_vlan_pcp_zero(vlan_tci)) ||
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is_vlan_pcp_wildcarded(vlan_tci_mask)))
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return true;
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return false;
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}
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static bool bits_set(void *key, int len)
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{
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const u8 *p = key;
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@@ -803,9 +827,9 @@ static bool bnxt_tc_can_offload(struct bnxt *bp, struct bnxt_tc_flow *flow)
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/* Currently VLAN fields cannot be partial wildcard */
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if (bits_set(&flow->l2_key.inner_vlan_tci,
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sizeof(flow->l2_key.inner_vlan_tci)) &&
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!is_exactmatch(&flow->l2_mask.inner_vlan_tci,
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sizeof(flow->l2_mask.inner_vlan_tci))) {
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netdev_info(bp->dev, "Wildcard match unsupported for VLAN TCI\n");
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!is_vlan_tci_allowed(flow->l2_mask.inner_vlan_tci,
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flow->l2_key.inner_vlan_tci)) {
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netdev_info(bp->dev, "Unsupported VLAN TCI\n");
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return false;
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}
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if (bits_set(&flow->l2_key.inner_vlan_tpid,
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@@ -169,7 +169,6 @@ static int bnxt_req_msix_vecs(struct bnxt_en_dev *edev, int ulp_id,
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edev->ulp_tbl[ulp_id].msix_requested = avail_msix;
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}
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bnxt_fill_msix_vecs(bp, ent);
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bnxt_set_max_func_irqs(bp, bnxt_get_max_func_irqs(bp) - avail_msix);
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bnxt_set_max_func_cp_rings(bp, max_cp_rings - avail_msix);
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edev->flags |= BNXT_EN_FLAG_MSIX_REQUESTED;
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return avail_msix;
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@@ -192,7 +191,6 @@ static int bnxt_free_msix_vecs(struct bnxt_en_dev *edev, int ulp_id)
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msix_requested = edev->ulp_tbl[ulp_id].msix_requested;
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bnxt_set_max_func_cp_rings(bp, max_cp_rings + msix_requested);
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edev->ulp_tbl[ulp_id].msix_requested = 0;
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bnxt_set_max_func_irqs(bp, bnxt_get_max_func_irqs(bp) + msix_requested);
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edev->flags &= ~BNXT_EN_FLAG_MSIX_REQUESTED;
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if (netif_running(dev)) {
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bnxt_close_nic(bp, true, false);
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@@ -660,7 +660,7 @@ static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id,
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id_tbl->max = size;
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id_tbl->next = next;
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spin_lock_init(&id_tbl->lock);
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id_tbl->table = kcalloc(DIV_ROUND_UP(size, 32), 4, GFP_KERNEL);
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id_tbl->table = kcalloc(BITS_TO_LONGS(size), sizeof(long), GFP_KERNEL);
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if (!id_tbl->table)
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return -ENOMEM;
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@@ -6,11 +6,15 @@
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* Copyright (C) 2004 Sun Microsystems Inc.
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* Copyright (C) 2005-2016 Broadcom Corporation.
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* Copyright (C) 2016-2017 Broadcom Limited.
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* Copyright (C) 2018 Broadcom. All Rights Reserved. The term "Broadcom"
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* refers to Broadcom Inc. and/or its subsidiaries.
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*
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* Firmware is:
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* Derived from proprietary unpublished source code,
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* Copyright (C) 2000-2016 Broadcom Corporation.
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* Copyright (C) 2016-2017 Broadcom Ltd.
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* Copyright (C) 2018 Broadcom. All Rights Reserved. The term "Broadcom"
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* refers to Broadcom Inc. and/or its subsidiaries.
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*
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* Permission is hereby granted for the distribution of this firmware
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* data in hexadecimal or equivalent format, provided this copyright
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@@ -9291,6 +9295,15 @@ static int tg3_chip_reset(struct tg3 *tp)
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tg3_restore_clk(tp);
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/* Increase the core clock speed to fix tx timeout issue for 5762
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* with 100Mbps link speed.
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*/
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if (tg3_asic_rev(tp) == ASIC_REV_5762) {
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val = tr32(TG3_CPMU_CLCK_ORIDE_ENABLE);
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tw32(TG3_CPMU_CLCK_ORIDE_ENABLE, val |
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TG3_CPMU_MAC_ORIDE_ENABLE);
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}
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/* Reprobe ASF enable state. */
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tg3_flag_clear(tp, ENABLE_ASF);
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tp->phy_flags &= ~(TG3_PHYFLG_1G_ON_VAUX_OK |
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@@ -7,6 +7,8 @@
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* Copyright (C) 2004 Sun Microsystems Inc.
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* Copyright (C) 2007-2016 Broadcom Corporation.
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* Copyright (C) 2016-2017 Broadcom Limited.
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* Copyright (C) 2018 Broadcom. All Rights Reserved. The term "Broadcom"
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* refers to Broadcom Inc. and/or its subsidiaries.
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*/
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#ifndef _T3_H
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Reference in New Issue
Block a user