xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm64: dts: rockchip: reorder rk3399 hdmi clocks

Browse Source 
[ Upstream commit 2e8a8b5955a000cc655f7e368670518cbb77fe58 ]

The binding specifies the clock order to "cec", "grf", "vpll". Reorder
the clocks accordingly.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20220126145549.617165-19-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Sascha Hauer
2022-01-26 15:55:40 +01:00
committed by Greg Kroah-Hartman
parent f7f062919f
commit c5c8c649fe
1 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@@ -1770,10 +1770,10 @@
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_HDMI_CTRL>, clocks = <&cru PCLK_HDMI_CTRL>,
<&cru SCLK_HDMI_SFR>, <&cru SCLK_HDMI_SFR>,
<&cru PLL_VPLL>, <&cru SCLK_HDMI_CEC>,
<&cru PCLK_VIO_GRF>, <&cru PCLK_VIO_GRF>,
<&cru SCLK_HDMI_CEC>; <&cru PLL_VPLL>;
clock-names = "iahb", "isfr", "vpll", "grf", "cec"; clock-names = "iahb", "isfr", "cec", "grf", "vpll";
power-domains = <&power RK3399_PD_HDCP>; power-domains = <&power RK3399_PD_HDCP>;
reg-io-width = <4>; reg-io-width = <4>;
rockchip,grf = <&grf>; rockchip,grf = <&grf>;