sparc64: recognize and support Sonoma CPU type
Add code to recognize SPARC-Sonoma cpu correctly and update cpu hardware caps and cpu distribution map. SPARC-Sonoma is based upon SPARC-M7 core along with additional PCI functions added on and is reported by firmware as "SPARC-SN". Signed-off-by: Khalid Aziz <khalid.aziz@oracle.com> Acked-by: Allen Pais <allen.pais@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

parent
5bde2c9be7
commit
c5b8b5beee
@@ -1769,6 +1769,7 @@ static void __init setup_page_offset(void)
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max_phys_bits = 47;
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break;
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case SUN4V_CHIP_SPARC_M7:
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case SUN4V_CHIP_SPARC_SN:
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default:
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/* M7 and later support 52-bit virtual addresses. */
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sparc64_va_hole_top = 0xfff8000000000000UL;
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@@ -1986,6 +1987,7 @@ static void __init sun4v_linear_pte_xor_finalize(void)
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*/
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switch (sun4v_chip_type) {
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case SUN4V_CHIP_SPARC_M7:
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case SUN4V_CHIP_SPARC_SN:
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pagecv_flag = 0x00;
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break;
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default:
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@@ -2138,6 +2140,7 @@ void __init paging_init(void)
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*/
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switch (sun4v_chip_type) {
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case SUN4V_CHIP_SPARC_M7:
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case SUN4V_CHIP_SPARC_SN:
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page_cache4v_flag = _PAGE_CP_4V;
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break;
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default:
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