clk: meson-gxbb: expose spdif clock gates
Expose the clock gates required for the spdif output Acked-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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@@ -19,6 +19,7 @@
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#define CLKID_SPI 34
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#define CLKID_ETH 36
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#define CLKID_AIU_GLUE 38
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#define CLKID_IEC958 39
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#define CLKID_I2S_OUT 40
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#define CLKID_MIXER_IFACE 44
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#define CLKID_AIU 47
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@@ -31,6 +32,7 @@
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#define CLKID_SANA 69
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#define CLKID_GCLK_VENCI_INT0 77
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#define CLKID_AOCLK_GATE 80
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#define CLKID_IEC958_GATE 81
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#define CLKID_AO_I2C 93
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#define CLKID_SD_EMMC_A 94
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#define CLKID_SD_EMMC_B 95
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