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clk: meson-gxbb: expose spdif clock gates

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Expose the clock gates required for the spdif output

Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
This commit is contained in:
Jerome Brunet
2017-03-02 15:22:29 +01:00
parent 2ea659a9ef
commit c5aee2bc99
2 changed files with 4 additions and 2 deletions
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4
drivers/clk/meson/gxbb.h
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@@ -209,7 +209,7 @@
/* CLKID_ETH */
#define CLKID_DEMUX 37
/* CLKID_AIU_GLUE */
#define CLKID_IEC958 39
/* CLKID_IEC958 */
/* CLKID_I2S_OUT */
#define CLKID_AMCLK 41
#define CLKID_AIFIFO2 42
@@ -251,7 +251,7 @@
#define CLKID_GCLK_VENCI_INT 78
#define CLKID_DAC_CLK 79
/* CLKID_AOCLK_GATE */
#define CLKID_IEC958_GATE 81
/* CLKID_IEC958_GATE */
#define CLKID_ENC480P 82
#define CLKID_RNG1 83
#define CLKID_GCLK_VENCI_INT1 84