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powerpc: Remove use of a second scratch SPRG in STAB code

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The STAB code used on Power3 and RS/64 uses a second scratch SPRG to
save a GPR in order to decide whether to go to do_stab_bolted_* or
to handle a normal data access exception.

This prevents our scheme of freeing SPRG3 which is user visible for
user uses since we cannot use SPRG0 which, on RS/64, seems to be
read-only for supervisor mode (like POWER4).

This reworks the STAB exception entry to use the PACA as temporary
storage instead.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Benjamin Herrenschmidt
2009-07-16 19:36:57 +00:00
parent ee43eb788b
commit c5a8c0c99f
4 changed files with 55 additions and 30 deletions
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3
arch/powerpc/include/asm/reg.h
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@@ -654,7 +654,7 @@
* 64-bit server:
* - SPRG0 unused (reserved for HV on Power4)
* - SPRG1 scratch for exception vectors
* - SPRG2 scratch for exception vectors
* - SPRG2 unused
*
* All 32-bit:
* - SPRG3 current thread_info pointer
@@ -707,7 +707,6 @@
#ifdef CONFIG_PPC_BOOK3S_64
#define SPRN_SPRG_SCRATCH0 SPRN_SPRG1
#define SPRN_SPRG_SCRATCH1 SPRN_SPRG2
#endif
#ifdef CONFIG_PPC_BOOK3S_32