ath10k: implement rx reorder support
New firmware and firmware (qca6174 hw3.0+ and fw 266+) are capable of full aggregation rx reordering. If it's enabled then Rx is handled via a new, separate htt event. The rx ring behaviour is changed a little to support the new rx scheme. These changes shouldn't affect qca988x performance. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:

committed by
Kalle Valo

parent
8582bf3be7
commit
c545070e40
@@ -21,6 +21,7 @@
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#include <linux/bug.h>
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#include <linux/interrupt.h>
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#include <linux/dmapool.h>
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#include <linux/hashtable.h>
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#include <net/mac80211.h>
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#include "htc.h"
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@@ -286,7 +287,19 @@ enum htt_t2h_msg_type {
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HTT_T2H_MSG_TYPE_RC_UPDATE_IND = 0xc,
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HTT_T2H_MSG_TYPE_TX_INSPECT_IND = 0xd,
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HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION = 0xe,
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HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND = 0xf,
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HTT_T2H_MSG_TYPE_RX_PN_IND = 0x10,
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HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND = 0x11,
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HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND = 0x12,
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/* 0x13 reservd */
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HTT_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE = 0x14,
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/* FIXME: Do not depend on this event id. Numbering of this event id is
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* broken across different firmware revisions and HTT version fails to
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* indicate this.
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*/
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HTT_T2H_MSG_TYPE_TEST,
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/* keep this last */
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HTT_T2H_NUM_MSGS
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};
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@@ -655,6 +668,53 @@ struct htt_rx_fragment_indication {
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#define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_END_MASK 0x00000FC0
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#define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_END_LSB 6
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struct htt_rx_pn_ind {
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__le16 peer_id;
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u8 tid;
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u8 seqno_start;
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u8 seqno_end;
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u8 pn_ie_count;
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u8 reserved;
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u8 pn_ies[0];
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} __packed;
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struct htt_rx_offload_msdu {
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__le16 msdu_len;
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__le16 peer_id;
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u8 vdev_id;
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u8 tid;
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u8 fw_desc;
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u8 payload[0];
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} __packed;
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struct htt_rx_offload_ind {
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u8 reserved;
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__le16 msdu_count;
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} __packed;
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struct htt_rx_in_ord_msdu_desc {
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__le32 msdu_paddr;
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__le16 msdu_len;
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u8 fw_desc;
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u8 reserved;
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} __packed;
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struct htt_rx_in_ord_ind {
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u8 info;
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__le16 peer_id;
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u8 vdev_id;
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u8 reserved;
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__le16 msdu_count;
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struct htt_rx_in_ord_msdu_desc msdu_descs[0];
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} __packed;
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#define HTT_RX_IN_ORD_IND_INFO_TID_MASK 0x0000001f
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#define HTT_RX_IN_ORD_IND_INFO_TID_LSB 0
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#define HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK 0x00000020
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#define HTT_RX_IN_ORD_IND_INFO_OFFLOAD_LSB 5
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#define HTT_RX_IN_ORD_IND_INFO_FRAG_MASK 0x00000040
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#define HTT_RX_IN_ORD_IND_INFO_FRAG_LSB 6
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/*
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* target -> host test message definition
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*
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@@ -1150,6 +1210,9 @@ struct htt_resp {
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struct htt_rx_test rx_test;
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struct htt_pktlog_msg pktlog_msg;
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struct htt_stats_conf stats_conf;
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struct htt_rx_pn_ind rx_pn_ind;
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struct htt_rx_offload_ind rx_offload_ind;
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struct htt_rx_in_ord_ind rx_in_ord_ind;
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};
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} __packed;
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@@ -1197,6 +1260,20 @@ struct ath10k_htt {
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* filled.
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*/
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struct sk_buff **netbufs_ring;
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/* This is used only with firmware supporting IN_ORD_IND.
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*
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* With Full Rx Reorder the HTT Rx Ring is more of a temporary
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* buffer ring from which buffer addresses are copied by the
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* firmware to MAC Rx ring. Firmware then delivers IN_ORD_IND
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* pointing to specific (re-ordered) buffers.
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*
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* FIXME: With kernel generic hashing functions there's a lot
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* of hash collisions for sk_buffs.
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*/
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bool in_ord_rx;
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DECLARE_HASHTABLE(skb_table, 4);
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/*
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* Ring of buffer addresses -
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* This ring holds the "physical" device address of the
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@@ -1270,6 +1347,7 @@ struct ath10k_htt {
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struct tasklet_struct txrx_compl_task;
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struct sk_buff_head tx_compl_q;
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struct sk_buff_head rx_compl_q;
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struct sk_buff_head rx_in_ord_compl_q;
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/* rx_status template */
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struct ieee80211_rx_status rx_status;
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@@ -1333,6 +1411,7 @@ int ath10k_htt_tx_alloc(struct ath10k_htt *htt);
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void ath10k_htt_tx_free(struct ath10k_htt *htt);
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int ath10k_htt_rx_alloc(struct ath10k_htt *htt);
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int ath10k_htt_rx_ring_refill(struct ath10k *ar);
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void ath10k_htt_rx_free(struct ath10k_htt *htt);
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void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb);
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