[SPARC64]: Deal with PTE layout differences in SUN4V.
Yes, you heard it right, they changed the PTE layout for SUN4V. Ho hum... This is the simple and inefficient way to support this. It'll get optimized, don't worry. Signed-off-by: David S. Miller <davem@davemloft.net>
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@@ -131,16 +131,8 @@ kvmap_dtlb_4v:
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brgez,pn %g4, kvmap_dtlb_nonlinear
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nop
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#define KERN_HIGHBITS ((_PAGE_VALID|_PAGE_SZ4MB)^0xfffff80000000000)
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#define KERN_LOWBITS (_PAGE_CP | _PAGE_CV | _PAGE_P | _PAGE_W)
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sethi %uhi(KERN_HIGHBITS), %g2
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or %g2, %ulo(KERN_HIGHBITS), %g2
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sllx %g2, 32, %g2
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or %g2, KERN_LOWBITS, %g2
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#undef KERN_HIGHBITS
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#undef KERN_LOWBITS
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sethi %hi(kern_linear_pte_xor), %g2
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ldx [%g2 + %lo(kern_linear_pte_xor)], %g2
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.globl kvmap_linear_patch
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kvmap_linear_patch:
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