MIPS: Loongson 3: Add CPU hotplug support
Tips of Loongson's CPU hotplug: 1, To fully shutdown a core in Loongson 3, the target core should go to CKSEG1 and flush all L1 cache entries at first. Then, another core (usually Core 0) can safely disable the clock of the target core. So play_dead() call loongson3_play_dead() via CKSEG1 (both uncached and unmmaped). 2, The default clocksource of Loongson is MIPS. Since clock source is a global device, timekeeping need the CP0' Count registers of each core be synchronous. Thus, when a core is up, we use a SMP_ASK_C0COUNT IPI to ask Core-0's Count. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6639 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle

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@@ -37,6 +37,7 @@
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#endif
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extern void fixup_irqs(void);
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extern void loongson3_ipi_interrupt(struct pt_regs *regs);
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#include_next <irq.h>
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@@ -249,6 +249,9 @@ static inline void do_perfcnt_IRQ(void)
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#define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68)
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#define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c)
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/* Chip Config */
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#define LOONGSON_CHIPCFG0 LOONGSON_REG(LOONGSON_REGBASE + 0x80)
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/* pcimap */
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#define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f
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@@ -264,9 +267,6 @@ static inline void do_perfcnt_IRQ(void)
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#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ
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#include <linux/cpufreq.h>
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extern struct cpufreq_frequency_table loongson2_clockmod_table[];
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/* Chip Config */
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#define LOONGSON_CHIPCFG0 LOONGSON_REG(LOONGSON_REGBASE + 0x80)
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#endif
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/*
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@@ -42,6 +42,7 @@ extern int __cpu_logical_map[NR_CPUS];
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#define SMP_ICACHE_FLUSH 0x4
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/* Used by kexec crashdump to save all cpu's state */
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#define SMP_DUMP 0x8
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#define SMP_ASK_C0COUNT 0x10
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extern volatile cpumask_t cpu_callin_map;
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