powerpc/476: define specific cpu table entry DD2 core
The DD2 core still has some unstability. Define CPU_FTR_476_DD2 to enable workarounds in later patches. This is based on an earlier, unreleased patch for DD1 by Ben Herrenschmidt. Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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committed by
Josh Boyer

parent
8960f7ff50
commit
c48d0dbaac
@@ -154,6 +154,7 @@ extern const char *powerpc_base_platform;
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#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000)
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#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000)
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#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000)
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#define CPU_FTR_476_DD2 ASM_CONST(0x0000000000010000)
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#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000)
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#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000)
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#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000)
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@@ -465,7 +466,7 @@ enum {
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CPU_FTRS_44X | CPU_FTRS_440x6 |
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#endif
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#ifdef CONFIG_PPC_47x
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CPU_FTRS_47X |
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CPU_FTRS_47X | CPU_FTR_476_DD2 |
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#endif
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#ifdef CONFIG_E200
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CPU_FTRS_E200 |
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